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An innovative firm is seeking a talented Design Verification Engineer to enhance enterprise LLMs through advanced hardware design. This role offers the opportunity to work on cutting-edge technology, contributing to the development of training data that significantly improves LLM capabilities. You will collaborate with diverse teams, ensuring the highest standards in coding and documentation while tackling complex challenges in hardware design. If you're passionate about hardware engineering and eager to make a meaningful impact in the tech industry, this position is perfect for you.
Design Verification Engineer - VLSI/ASIC/FPGA Hardware
Experience: 3 - 25 Years
Location: Permanent Remote anywhere in the World
Contract Length: 6 Months
Type: Full time contract (8 hrs/day) Overlap Hours: 4 hrs/day with PST
Mandatory Skills:
Experience With One Or More On The List Below:
Experience with one or more on the list below:
Good communication skills in English.
LLM experience is not mandatory; however, the candidate should be fine to work as a LLM Engineer for Verilog.
Must-Have:
Job Description:
We're searching for an exceptional hardware design Developer to play a pivotal role in using the hardware design platform to generate the training data to enhance enterprise LLMs' capabilities. This unique position offers the chance to directly contribute to the sophistication of enterprise LLMs, ensuring they operate with unparalleled efficiency and intelligence.
Your Mission:
We Need: