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Automation Engineer

Fondazione Chips-It

Lodi

Ibrido

EUR 50.000 - 70.000

Tempo pieno

Oggi
Candidati tra i primi

Descrizione del lavoro

A national research center in Lodi is seeking an experienced member of the Microelectronics Design Center to oversee EDA flows, manage PDKs, and optimize design tools. Ideal candidates will have a degree in Electrical Engineering and experience with semiconductor processes. The position offers competitive compensation, lunch tickets, and health care benefits, along with a hybrid work policy.

Servizi

Competitive compensation
Lunch tickets
Private health care coverage
Structured growth path
Networking opportunities
Hybrid work policy
Tax deductions for candidates from abroad

Competenze

  • Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field focused on EDA tools.
  • Proven experience in maintaining EDA tools and PDKs.
  • Hands-on experience with IC testers and emulators for pre-silicon verification.

Mansioni

  • Maintain and optimize EDA toolchains for digital design.
  • Manage PDK installations and liaise with foundries.
  • Calibrate and troubleshoot IC testers and emulators.

Conoscenze

EDA tools maintenance
PDK management
IC testers and emulators
Semiconductor fabrication processes
Hardware description languages (Verilog, VHDL)
Digital design workflows

Formazione

Bachelor's or Master’s degree in Electrical Engineering or related field

Strumenti

Cadence
Synopsys
Mentor Graphics
Descrizione del lavoro

The Chips-IT Foundation is seeking an experienced member of the Microelectronics Design Center technical staff responsible for the maintenance of EDA Flows, PDKs, and Electronics Equipment. The role focuses on overseeing critical design tools, managing Process Design Kits (PDKs), and maintaining key lab infrastructure such as IC testers and emulators. Additionally, the position involves optimizing Electronic Design Automation (EDA) flows, managing communication with foundries and packaging houses, and ensuring an efficient R&D environment for SoC design.

Key Responsibilities
  • Maintain and optimize EDA toolchains for digital design, including simulation, synthesis, verification, and layout.
  • Manage PDK installations, acting as the liaison with foundries for issue resolution and updates.
  • Maintain, calibrate, and troubleshoot IC testers and emulators to ensure continuous research support.
  • Facilitate the integration of PDKs into EDA workflows, ensuring seamless SoC design from concept to tape-out and testing.
  • Coordinate with vendors for tool procurement, licensing, maintenance contracts, and upgrades.
  • Manage interactions with packaging houses for post-fabrication processes, ensuring proper handling and assembly of SoCs.
  • Ensure accurate documentation of tool installations, maintenance schedules, and best practices for EDA flows and equipment.
Required Qualifications
  • Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field focused on EDA tools, PDKs, or semiconductor processes.
  • Proven experience in maintaining EDA tools and managing PDKs (Cadence, Synopsys, Mentor Graphics).
  • Hands-on experience with IC testers and emulators for pre-silicon verification.
  • Strong understanding of semiconductor fabrication processes, including interactions with foundries and packaging houses.
  • Familiarity with hardware description languages (Verilog, VHDL) and digital design workflows.
  • Experience with advanced process nodes (e.g., 28nm, 16nm) and supporting tape-outs, packaging and testing.
What we offer
  • Competitive compensation and contract type, to be negotiated based on qualifications and experience
  • Lunch tickets
  • Private health care coverage depending on your role and contract
  • Structured growth path, with ongoing access to training and updates
  • Networking opportunities with industry-leading professionals
  • International environment
  • Hybrid work policy
  • Tax deductions : Candidates from abroad, comprising Italian citizens, who have carried scientific research activity abroad and meet specific requirements, may be entitled to a taxable income deduction up to 90% for a period of 6 to 13 years
About Fondazione Chips-IT

The Foundation “Italian Center for the Design of Semiconductor Integrated Circuits,” also known as the Chips-IT Foundation, is a national research center under the supervision of the Ministry of Industry.

The Foundation is Italy's first RTO (Research and Technology Organization) vertically focused on semiconductor research and stands as a center of excellence in frontier research on semiconductor design, as well as a pivotal center of the Italian semiconductor ecosystem and expertise.

Missions of the Foundation
  • promote the design and development of integrated circuits
  • strengthen the system of professional training in the field of microelectronics
  • ensure the establishment of a network of universities, research centers and enterprises that fosters innovation and technology
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