Analog IC Layout Engineer with finFET experience

Chipright; Teramo; In loco; EUR 60.000 - 85.000; Tempo pieno

Descrizione del lavoro

A leading company in semiconductor technology is looking for a Senior Analog IC Layout Engineer to join its team. This role involves responsibility for the physical design of high-speed analog circuits, particularly in advanced FinFET technologies. It offers the chance to work alongside experienced engineers on innovative products, emphasizing collaboration and excellent communication skills.

Competenze

• 7+ years’ minimum experience in Analog / Analog mixed signal IC layout.
• Experience with the FinFET process, especially 16nm, 7nm.
• Excellent understanding of mixed-signal semiconductor circuit technology.

Mansioni

• Lead physical design of Analog and Mixed Signal circuits for High-Speed Serializer / Deserializer.
• Drive layout strategies for complex products.
• Collaborate with various engineering teams.

Conoscenze

Analog / Analog mixed signal IC layout

FinFET process knowledge

High-speed applications

Hardware description languages (VerilogA, VerilogAMS)

Communication skills

Teamwork

Fluent English

Descrizione del lavoro

Analog IC Layout Engineer with finFET experience

Location : N / A

Contract

Senior Analog IC Layout Engineer with finFET experience

Chipright seeks highly motivated and experienced Analog Layout engineers to work in developing and delivering IP to our customers. This is a fantastic opportunity for talented engineers to work within a team of highly experienced engineers with experience in high-speed technology, CMOS, and FinFET.

As an experienced Layout Engineer, you will have first-hand responsibility for the physical design (i.e., the actual implementation) of Analog and Mixed Signal circuits for High-Speed Serializer / Deserializer (SerDes). You will work on high-performance analog and high-frequency circuits in the most scaled CMOS technologies, interact with designers, and drive layout strategies for very complex products.

Requirements

• 7+ years’ minimum experience with Analog / Analog mixed signal IC layout
• Experience / knowledge of the FinFET process, especially 16nm, 7nm
• Layout of Analog IPs such as Data Converters (A / D, D / A), Phase Locked Loop (PLL), Tc / RX reference circuits with emphasis on high-speed applications
• Profound knowledge of hardware description languages (VerilogA, VerilogAMS)
• Collaborate with Applications, Process Technology, CAD, Test, Reliability, Marketing, and Product Engineering
• Excellent understanding of mixed-signal semiconductor circuit technology
• Excellent communication skills and ability to work in a team
• Very good command of English (fluent in spoken and written)

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