Analog IC Layout Engineer with finFET experience

Chipright; Bergamo; In loco; EUR 30.000 - 50.000; Tempo pieno

Descrizione del lavoro

A leading semiconductor company is seeking a skilled Senior Analog IC Layout Engineer to develop and deliver IP for high-speed applications. The role requires over 7 years of experience with Analog layouts and knowledge of FinFet processes. You will collaborate with multiple teams to drive layout strategies for complex products, working in an innovative environment focused on high performance circuits.

Competenze

• 7+ years’ minimum experience with Analog / Analog mixed signal IC layout.
• Experience/knowledge of the FinFet process, especially 16nm, 7nm.
• Excellent understanding of mixed-signal semiconductor circuit technology.

Mansioni

• Implement physical designs for Analog and Mixed Signal circuits.
• Work on high performance analog and high frequency circuits.
• Collaborate with various engineering teams.

Conoscenze

Analog / Mixed signal IC layout

FinFet process knowledge

Hardware description languages (VerilogA, VerilogAMS)

High speed applications

Descrizione del lavoro

Analog IC Layout Engineer with finFET experience

Location : N / A

Contract

Senior Analog IC Layout Engineer with finFET experience

Chipright seeks highly motivated and experienced Analog Layout engineers to work in developing and delivering IP to our customers. This is a fantastic opportunity for talented engineers to work within a team of highly experienced engineers with experience with high-speed technology, CMOS and FinFet.

Seeking experienced Layout Engineers, you will have first-hand responsibility for the physical design (i.e. the actual implementation) of Analog and Mixed Signal circuits for High Speed Serializer / Deserializer (SerDes); you will work on high performance analog and high frequency circuits in the most scaled CMOS technologies, interact with designers and drive layout strategies for very complex products.

Requirements

• 7+ years’ minimum experience with Analog / Analog mixed signal IC layout
• Experience / knowledge of the FinFet process especially 16nm, 7nm
• Layout of AnalogIPs such as Data Converters (A / D, D / A), Phase Locked Loop (PLL), Tc / RX reference circuits with emphasis on high speed applications.
• Profound knowledge of hardware description languages (VerilogA, VerilogAMS)
• Collaborate with Applications, Process Technology, CAD, Test, Reliability, Marketing and Product Engineering;
• Excellent understanding of mixed-signal semiconductor circuit technology
• Excellent communication skills and ability to work in a team
• Very good command of English (fluent in spoken and written)

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Senior Analog & AMS Recruitment Specialist

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