Analog IC Design Lead - SerDes

IC Resources; Cagliari; In loco; EUR 80.000 - 120.000; Tempo pieno

Descrizione del lavoro

An innovative technology company is seeking a senior Analog IC Design Lead for a fully remote position. In this role, you will lead the design strategy for SerDes analog and mixed-signal solutions, mentor engineers, and drive product delivery to market. The ideal candidate will have a Master’s degree, over 15 years of industry experience, expertise in high-speed circuit design, and proficiency in EDA tools.

Competenze

• Bachelor’s or Master’s in Electrical Engineering or related discipline, with 15+ years’ industry experience.
• Proven leadership in analog and mixed-signal design for SerDes applications.
• Exceptional communication and decision-making skills.

Mansioni

• Provide technical leadership for the design of key SerDes IP.
• Oversee the development of core analog building blocks.
• Define and drive SerDes architecture in collaboration with system architects.

Conoscenze

Leadership

Analog Design

Mixed-Signal Design

High-Speed Circuit Design

Signal Integrity

Power Integrity

Communication Skills

Formazione

Bachelor’s or Master’s in Electrical Engineering

Strumenti

EDA tools

Descrizione del lavoro

I am recruiting for an innovative and fast-growing technology company developing next-generation solutions for high-performance data communication. This is a senior leadership role with the flexibility of fully remote working.

As an Analog IC Design Lead , you will take ownership of the full SerDes analog and mixed-signal design strategy, guiding technical direction, mentoring engineers, and ensuring delivery of industry-leading performance. You will shape the architecture, influence design methodologies, and play a pivotal role in the successful release of complex products in advanced CMOS FinFET technologies.

Key Responsibilities

• Provide technical leadership for the design of key SerDes IP
• Oversee and be involved in the development of core analog building blocks
• Define and drive SerDes architecture in collaboration with system architects and other functional teams
• Establish robust verification and sign-off strategies to meet aggressive performance and reliability targets
• Lead and mentor engineering teams, fostering best practices in design, simulation, and layout
• Support silicon bring-up, validation and characterisation, providing direction through to product launch

Requirements

Bachelor’s or Master’s in Electrical Engineering or related discipline, with 15+ years’ industry experience

Proven leadership in analog and mixed-signal design for SerDes applications

Strong expertise in high-speed circuit design, signal integrity, and power integrity

Proficiency with EDA tools

Exceptional communication and decision-making skills, with the ability to lead in a fast-paced, collaborative environment

If you are an experienced engineer with a track record in FINFET SerDes design, get in touch with Parm Shergill.