Verification Engineer-2437

Sunrise Biztech Systems; Hyderabad; On-site; INR 1,800,000 - 2,400,000; Full time

Job summary

Sunrise Biztech Systems Hyderabad is seeking an experienced Verification Engineer with 8-10 years in IP/ASIC verification. The role involves collaborating with architects and design engineers to verify new features, building comprehensive test plans and developing directed and random tests.

Strong knowledge of UVM, SystemVerilog, and formal verification is essential, with excellent communication skills. Ideal candidates will have experience in verifying complex hardware modules, and familiarity

Qualifications

• 8-10 years of IP/ASIC verification experience.
• Experience in verifying complex hardware blocks.
• Strong knowledge of modern verification practices (UVM, Formal Verification).

Responsibilities

• Collaborate with architects and design engineers to understand features to be verified.
• Build test plan documentation, accounting for interactions with hardware, firmware, and software driver use cases.
• Estimate time to write new feature tests and test-environment changes.
• Build directed and random verification tests.
• Debug test failures with RTL and firmware engineers to resolve defects and test issues.
• Review coverage metrics and adjust tests to meet coverage requirements.

Skills

ASIC verification

Self-checking testbenches

Coverage closure techniques

Regression management

UVM

Formal Verification

SystemVerilog

Verilog

Excellent communication

Education

Bachelor in Electrical/Computer/Software Engineering

Master degree an asset

Tools

UVM

Job description

Urgent Hiring!!!

Greetings from Sunrise Biztech Systems Pvt. Ltd.

We are hiring for one of our reputed clients for the following position. If you're interested and your experience matches the requirement, we'd love to hear from you.

Position: Verification Engineer Experience: 8-10 Years

Location: Hyderabad

Full Time Employment/Contractual

Role & responsibilities:

Description: 10+ years experience Experience in IP verification

THE PERSON:

The ideal candidate will possess a problem-solving mindset, attention to detail and the curiosity to uncover hard to find issues.

KEY RESPONSIBILITIES:

• Collaborate with architects and design engineers to understand the new features to be verified
• Build test plan documentation, accounting for interactions with other features, the hardware, the firmware, and the software driver use cases
• Estimate the time required to write the new feature tests and any required changes to the test environment
• Build the directed and random verification tests
• Debug test failures to determine the root cause; work with RTL and firmware engineers to resolve design defects and correct any test issues
• Review functional and code coverage metrics modify or add tests or constrain random tests to meet the coverage requirements

PREFERRED EXPERIENCE:

• Prior experience in ASIC verification
• Extensive experience in designing and implementing self-checking testbenches, coverage closure techniques and regression management flows
• In depth knowledge of modern verification practices including UVM, Formal Verification and assertion-based test
• Experience and knowledge of communications standards (such as Ethernet, Flex Ethernet, OTN, Interlaken)
• Fluency in Verilog or System Verilog
• Excellent written and verbal communication skills

Preferred candidate profile:

ACADEMIC CREDENTIAL: Bachelor in Electrical/Computer/Software Engineering, Master degree an asset