Verification Engineer-2458

Sunrise Biztech Systems; Bengaluru; On-site; INR 900,000 - 1,200,000; Full time

Job summary

Sunrise Biztech Systems Pvt. Ltd. in Bengaluru seeks a Verification Engineer for a 6-month contract to verify CPU/GPU SoC blocks. You will participate in functional verification, develop test plans, and document results to meet project milestones.

Ideal candidates have 6–9 years of ASIC verification or hardware firmware experience, strong C/C++ in Linux, and familiarity with SystemVerilog, Verilog, DPI/PLI, GDB and Valgrind. Proficiency with OO, STL, Perl, and Makefiles is valued.

Qualifications

• 6–9 years of verification experience on large ASIC projects or hardware development.
• Strong background in C/C++ development in a Linux environment.
• Experience with GDB/Valgrind for debugging and performance analysis.
• Proficiency in OO programming, STL, and data structures; knowledge of Perl/Makefiles.
• Knowledge of Verilog/SystemVerilog/SystemC; DPI/PLI experience preferred.

Responsibilities

• Participate in functional verification of ASICs/IP blocks for CPU/GPU projects.
• Design and execute test plans with directed and constrained-random tests.
• Document verification results and adapt methodologies to evolving approaches.
• Collaborate with design and verification teams across the project.

Skills

C/C++

SystemVerilog

Verilog

Linux

GDB

Valgrind

DPI/PLI

Tools

JIRA

Confluence

SharePoint

Excel

MS Office

Job description

Urgent Hiring!!!

Greetings from Sunrise Biztech Systems Pvt. Ltd.

We are hiring for one of our reputed clients for the following position. If you're interested and your experience matches the requirement, we'd love to hear from you.

Position: Verification Engineer 3
Experience: 5 Years

Location: Bangalore

Contract - 6 months

Participate in the functional verification of a block(s) of complex ASICs and/or IP cores for a combined CPU/GPU development effort. Be part of a team of design and verification engineers, working closely with other team members to understand and verify the functionality of a given design element within the context of the block, chip and overall system. Be responsible for carefully documenting and executing test plan(s) consisting of directed and constrained-random tests to be run during simulation. Be expected to adopt the evolving verification methodologies used in the industry to functionally verify increasingly more complex SoC designs within aggressive, market-driven schedules, and work within the existing verification infrastructure on currently active projects. Be familiar with hardware modeling and/or assertion-based verification methods.EXPERIENCE AND EDUCATION: 6-9 years of proven verification experience on large ASIC development projects or software/firmware experience in a hardware development setting;Strong background in C/C++ development in a Linux Environment;Strong debug skills and experience with debug tools such as Gdb, Valgrind;Proficient in Object Oriented programming, STL, computer architecture and data structures;Knowledge of Perl and Makefiles;Experience in Verilog/SystemVerilog/SystemC, preferred;Experience in C/Verilog environment using DPI/PLI, preferred;Strong analytical skills and attention to detail;Excellent written and communication skills

Desirable Skills:

• Proficiency in tools like JIRA, Confluence, SharePoint, Excel and MS Office
• Own resource tracking, status reporting, and issue communication to key partners, including senior executives and customers.
• Prepare and deliver project status updates and reviews to internal stakeholders
• Review functional and code coverage metrics modify or add tests or constrain random tests to meet the coverage requirements