Verification Engineer 1

Sunrise Biztech Systems; Hyderabad; On-site; INR 600,000 - 1,200,000; Full time

Job summary

Sunrise Biztech Systems in Hyderabad seeks a Verification Engineer with 2–4 years of FPGA/Vivado experience to validate implementation flow stages and perform QOR analysis. The role focuses on validating placer, STA, timing constraints, and debugging within the Vivado flow. Experience with digital/logic design and EDA tools is essential; 1-year contract.

Bachelor's or Master's in ECE/EE/EI/VLSI preferred. Applicants should be ready to work on-site in Hyderabad and collaborate with the project

Qualifications

• To validate, test Vivado Implementation flow stages like placer, Static Timing Analysis.
• Basic requirements include Digital design, Logic Design, STA, Design Constraints, Debug skills.

Responsibilities

• Validate Vivado implementation flow stages such as placer and STA.
• Perform QOR analysis and debugging across FPGA design flow.

Skills

Vivado

FPGA flow

STA

Debug

Design constraints

Automation skills

AI usage knowledge

Education

Bachelors or Masters in ECE/EE/EI/VLSI

Tools

Xilinx Vivado

Job description

Position: Verification Engineer

Experience: 2-4 Years

Location: Hyderabad

Contract tenure: 1 year contract

Description:

Project - For Vivado implementation flow testing and QOR analysis

Job Description

To validate, test Vivado Implementation flow stages like placer, Static Timing Analysis. Person expected to have prior Vivado tool knowledge and FPGA flow awareness. Any EDA company experience is nice to have Digital design, Logic Design, STA, Design Constraints, Debug skills are basic requirements

Qualifications & Experiences:

• Bachelors or Masters in ECE, EE, EI, VLSI
• Min 2yrs, Max 4yrs
• Experience in Xilinx Vivado flow, specifically Implementation tool flow
• Experience in FPGA design flow, STA, Logic and System design
• Good to have automation skills and AI usage knowledge.