Test Engineer

Tessolve; Bengaluru; On-site; INR 3,359,000 - 5,878,000; Full time

Job summary

Tessolve in Singapore invites applications for a Post Silicon Validation/Test Engineer. You will develop test programs for Digital, PMIC, RF and Mixed-Signal devices on bench and ATE platforms, primarily Advantest 93K and Teradyne UltraFlex.

Collaborate with design, quality and foundry teams on silicon debugging, device characterization across PVT, and production release, with focus on yield improvement and test-time reduction.

Qualifications

• Graduates with a degree in Electronics or Electrical Engineering.
• 2–7 years of relevant Test Engineering experience preferred.
• Hands-on experience with Teradyne UltraFlex or Advantest 93K ATE is advantageous.
• Experience using bench instrumentation for IC characterization.
• Strong analytical and problem-solving abilities; hands-on lab work.
• Excellent verbal and written communication; ability to work independently.

Responsibilities

• Develop test programs for Digital, PMIC, RF & Mixed Signal devices on bench and ATE (primarily Advantest 93k - SmarTest 7, SmarTest 8 / Teradyne UFLEX).
• Work closely with design engineers on silicon debug, device characterization, test program bring up and production release activities.
• Debug of digital vectors (JTAG/SCAN/ATPG / Functional / Mbist) and Device characterization across PVT (Process, Voltage and Temperature).
• Understanding and experience in characterization of RF, PMIC or Mixed Signal IP (ADC, DAC, PLL and etc.).
• Involve on test program hand off, production release, yield improvement and test time reduction.
• High level of collaboration and interaction with different Product Engineering, Design Engineering, Quality Engineering, and Foundry Engineering teams.

Skills

Test engineering

Test program development

Bench testing

RF/Mixed signal knowledge

Troubleshooting

Lab autonomy

Education

Bachelor's degree in Electronics or Electrical Engineering

Tools

Advantest 93K ATE

SmarTest 7/8

Teradyne UltraFlex

Job description

Post Silicon Validation/Test(ATE/Bench) Engineer

Salary: 4000 SGD ~ 7000 SGD

Positions: 5

Job Description

• Test program development for Digital, PMIC, RF & Mixed Signal products on Bench and (or) ATE (primarily on Advantest 93k - SmarTest 7, SmarTest 8 / Teradyne UFLEX)
• Work closely with the design engineers on the first silicon debug, device characterization, test program bring up and production release activities
• Debug of digital vectors (JTAG/SCAN/ATPG / Functional / Mbist) and Device characterization across PVT (Process, Voltage and Temperature)
• Understanding and experience in characterization of RF, PMIC or Mixed Signal IP (ADC, DAC, PLL and etc.)
• Involve on test program hand off, production release, yield improvement and test time reduction
• High level of collaboration and interaction with different Product Engineering, Design Engineering, Quality Engineering, and Foundry Engineering teams.

Job Requirements

• Graduates from Degree in Electronics / Electrical Engineering
• Minimum 2-7 yrs relevant experience on the Test Engineering is preferred
• Hands on experience on Teradyne Ultra Flex or Advantest 93K ATE’s is added advantage.2
• Usage of bench instrumentation for characterization of ICs
• Good Knowledge of analog and digital electronics is desired.
• Strong analytical and problem solving ability with desire to perform hands‑on work within a lab environment is a must.
• Very strong verbal and written communication skills and able to work independently
• Only Singaporeans/ SPR preferred.