Tech Lead-Systems Design Engineer( FPGA & Firmware), 3+ years

Talent Bee; Bengaluru, Ernakulam; On-site; INR 1,200,000 - 1,800,000; Full time

Job summary

Talent Bee is seeking an FPGA/RTL Engineer in Bengaluru to design, develop and verify Verilog/VHDL for Xilinx/Intel FPGA platforms. The role covers MPSoC integration, IP cores, and PS-PL co-design, with emphasis on board bring-up, system validation and debugging.

Candidates should be comfortable with C, PetaLinux, Bare Metal, and common interfaces such as SPI, I2C, UART, Ethernet and PCIe, along with DDR/Flash validation. This is a full-time position based in Bengaluru.

Qualifications

• FPGA/RTL/MPSoC background with Verilog/VHDL expertise.
• Proficiency in Xilinx Vivado/Vitis or Intel Quartus.
• PS-PL integration and IP cores knowledge.
• Experience with C, PetaLinux, Bare Metal.
• Familiarity with interfaces: SPI, I2C, UART, Ethernet, PCIe.
• DDR/Flash validation and board bring-up readiness.

Skills

FPGA/RTL/MPSoC

Verilog/VHDL

PS-PL integration

IP cores

Tools

Xilinx Vivado/Vitis

Intel Quartus

C

PetaLinux

Bare Metal

Job description

FPGA/RTL Engineer – Key Requirements

• Verilog/VHDL design, development & verification
• Xilinx Zynq/UltraScale+ & Intel FPGA
• Simulation, synthesis & timing analysis
• IP integration & PS-PL co-design
• Board bring-up, system validation & debugging

Required Candidate profile

• FPGA/RTL/MPSoC, Verilog/VHDL
• Xilinx Vivado/Vitis or Intel Quartus
• PS-PL integration, IP cores
• C, PetaLinux, Bare Metal
• SPI, I2C, UART, Ethernet, PCIe
• DDR/Flash validation