Staff /Senior Design Engineer – IP/Sub-System

Tenstorrent

Bengaluru Urban

Hybrid

INR 1,200,000 - 1,600,000

Full time

14 days+

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Job summary

A leading semiconductor firm in India seeks a Staff Technical Recruiter to design and develop critical IPs and subsystems for high-performance CPU clusters. The ideal candidate has strong microarchitecture design skills and a passion for AI, along with 3+ years of relevant experience. This role offers a hybrid work model, collaboration with global teams, and opportunities in cutting-edge AI technology development.

Qualifications

3+ years of experience in design and development of IPs and subsystems.
Familiarity with design flow from spec to integration.
Understanding of power, timing, and area tradeoffs.

Responsibilities

Design and develop key IPs and subsystems for CPU clusters.
Collaborate with internal teams and external partners.
Own the full development lifecycle of IPs and subsystems.

Skills

Microarchitecture and RTL design

RISC-V or ARM architectures

Component design

Power optimization techniques

Inegration and bring-up

Mentoring and collaboration

Tools

Lint

Functional/performance debug tools

DV tools

Job description

Direct message the job poster from Tenstorrent

Staff Technical Recruiter @ Tenstorrent Inc. | Building high-performing teams with precision.

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities.

We’re looking for someone excited to design and develop key IPs and subsystems that go into high-performance CPU clusters. You’ll work closely with internal teams and external partners to build scalable, configurable components that power everything from HPC to automotive systems.

This role is Hybrid, based out of Bangalore, India.

We welcome candidates with 3+years of experience for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting.

Who You Are:

You have a strong background in IP and subsystem microarchitecture and RTL design.
You’re familiar with RISC-V or ARM-based architectures and interconnects like AXI or CHI.
You’ve worked across the design flow—from spec to RTL to integration and bring-up.
You enjoy mentoring others and collaborating with diverse teams.

What We Need:

Experience in designing components such as power management, debug, trace, and interrupt controllers.
Familiarity with tools and flows like Lint, CDC, RDC, and functional/performance debug.
Hands-on experience with DV tools and understanding of verification closure.
Understanding of power, timing, and area tradeoffs, including power optimization techniques.

What You Will Learn:

Collaborating with global teams on cross-functional design challenges.
Owning the full development lifecycle of IPs and subsystems.
Building systems that balance performance, power, and area for real-world products.
Contributing to silicon bring-up and validation of complex SoC architectures.

Seniority level