Staff/Principal Analog IC Design Engineer

Optalysys; Bengaluru; On-site; INR 3,500,000 - 7,000,000; Full time

Job summary

Optalysys is hiring a Staff/Principal High-Speed Analog/Mixed-Signal Front-End Design Engineer with 10–12+ years of experience to develop next-generation optical transceivers for 112–224 Gb/s data rates. The role focuses on photonic modulator drivers, TX front ends, TIAs, CTLE, and high-speed digital logic with strong CMOS/FinFET expertise.

You will own architecture through transistor‑level design, verification, and silicon debugging, collaborating across analog, digital, photonics, layout, and

Qualifications

• 10–12+ years of analog/mixed‑signal IC design experience.
• Strong experience in TIA, CTLE, high-speed amplifiers, slicers/comparators, TX drivers, clocking and custom high-speed digital circuits.
• Strong understanding of noise, jitter, bandwidth, stability, equalization, signal integrity and high-speed clock/data timing.
• Experience with advanced CMOS/FinFET technologies, parasitic extraction and post-layout verification.
• Hands‑on experience with Cadence Virtuoso/Spectre and high-speed analog/mixed‑signal simulation flows.
• Experience with silicon photonics, photonic modulators, photodiodes, SerDes or optical link design would be highly desirable.
• Ability to take ownership from architecture and specification definition through transistor-level design, verification, layout support and silicon debug.
• Strong technical communication skills and ability to work effectively across analog, digital, photonics, layout, package and system teams.

Responsibilities

• Work on photonic modulator drivers and high-speed TX front ends.
• Design high-speed digital clocking, serializers/deserializers, and datapath circuits.
• Focus on low noise, low jitter, good linearity and power-efficient operation in advanced CMOS.
• Collaborate across analog, digital, photonics, layout, package and system teams.

Skills

Analog IC design

Mixed-signal design

High-speed SerDes

Photonic integration

Cadence Virtuoso

Signal integrity

Architecture to layout

Cross-functional collaboration

Education

B.E./B.Tech, M.E./M.Tech or PhD in Electrical/Electronics, Microelectronics, VLSI

Tools

Cadence Virtuoso/Spectre

Job description

We’re hiring for a Staff/Principal High-Speed Analog/Mixed-Signal Front-End Design Engineer with 10–12+ years of relevant experience to work on next-generation optical transceivers supporting 112–224 Gb/s data rates.

The role will focus on photonic modulator drivers and high-speed TX front ends, together with TIA, CTLE, high-speed slicers and equalization/analog DSP techniques in the RX path. The role will also involve high-speed custom digital logic, including high-frequency clocking, serializers/deserializers, pipeline logic, dynamic/custom logic and timing‑critical datapath circuits.

We’re looking for strong transistor-level CMOS design expertise with a focus on very high 3–dB bandwidth, low noise, low jitter, good linearity, robust timing and power-efficient operation in advanced CMOS technologies.

Qualifications

• B.E./B.Tech, M.E./M.Tech or PhD in Electrical/Electronics Engineering, Microelectronics, VLSI or a related field.
• 10–12+ years of hands‑on analog/mixed‑signal IC design experience, ideally in high-speed SerDes, optical transceivers or wireline interfaces.
• Strong experience in TIA, CTLE, high-speed amplifiers, slicers/comparators, TX drivers, clocking and custom high-speed digital circuits.
• Strong understanding of noise, jitter, bandwidth, stability, equalization, signal integrity and high-speed clock/data timing.
• Experience with advanced CMOS/FinFET technologies, schematic-to‑layout interaction, parasitic extraction and post-layout verification.
• Hands‑on experience with Cadence Virtuoso/Spectre and high-speed analog/mixed‑signal simulation flows.
• Experience with silicon photonics, photonic modulators, photodiodes, SerDes or optical link design would be highly desirable.
• Ability to take ownership from architecture and specification definition through transistor-level design, verification, layout support and silicon debug.
• Strong technical communication skills and ability to work effectively across analog, digital, photonics, layout, package and system teams.