SRAM Design Engineer

MediaTek Research Lab Inc.; Bengaluru; On-site; INR 946,073 - 1,419,110; Full time

Job summary

MediaTek Research Lab Inc. is looking for a qualified candidate to design FCI (Fast Cache instances) for xPU (CPU/GPU) systems as part of the SRAM team. Responsibilities include defining design specifications, optimizing SRAM for performance metrics, and collaborating closely with both the layout and post-silicon teams.

The ideal candidate should have preferred proficiency in Python, Perl, Verilog, or System Verilog, and a solid understanding of schematic capture and simulation processes.

Qualifications

• Experience in designing FCI for xPU systems.
• Ability to define design specifications with CPU/GPU/APU teams.
• Skills in optimizing SRAM for power, timing, area, and yield.

Responsibilities

• Design FCI for xPU systems with the SRAM team.
• Define design specs with CPU/GPU/APU teams.
• Optimize SRAM for various metrics including power and timing.
• Collaborate with layout and post-silicon teams.

Skills

Proficiency in Python or Perl

Verilog

System Verilog

Job description

• Design FCI (Fast Cache instances) for xPU (CPU/GPU) systems with the SRAM team.• Define design specs with CPU/GPU/APU teams.• Optimize SRAM for power, timing, area, and yield.• Implement Single Port & Two Port SRAM circuits.

Main Requirements and Qualifications

• • Design FCI (Fast Cache instances) for xPU (CPU/GPU) systems with the SRAM team.
• • Define design specs with CPU/GPU/APU teams.
• • Optimize SRAM for power, timing, area, and yield.
• • Perform schematic capture, simulations, and margin checks.
• • Measure timing, power, leakage, and optimize post-layout.
• • Collaborate with the layout team.
• • Support post-silicon efforts and debugging.
• • Preferred Proficiency in Python or Perl, Verilog, System Verilog.
• o Tools: