R&D Engineer IC Design

Broadcom Inc.; Bengaluru; On-site; INR 1,500,000 - 2,000,000; Full time

Job summary

Broadcom Inc. is seeking an Engineer Memory Design Validation to join their Central Engineering Group. In this role, you will lead the validation of memory design compilers including SRAM and ROM for cutting-edge technology.

The ideal candidate will have over 9 years of experience and a Master in Electronics Engineering, with strong skills in building memory macros and conducting functional verifications.

Qualifications

• Minimum of 9+ years of relevant experience.
• Strong expertise in development of memory macros.
• Proficient in running transistor level simulators and writing automation scripts.

Responsibilities

• Lead Memory Design Validation of various memory compilers.
• Perform functional verification and resolve design discrepancies.
• Conduct signal integrity analysis and propose solutions.

Skills

Development of memory macros

Transistor level circuit behavior analysis

DFT Schemes and chip level integration

Cadence schematic/layout editor tools

Python scripting

Good communication and leadership skills

Education

Master in Electronics Engineering

Tools

HSPICE

Spectre

PrimeSim

Job description

Engineer Memory Design Validation

We are looking for energetic and passionate memory design validation engineers to join our Central Engineering Group and be part of an elite memory team responsible for the development of memory compilers and custom macros of all types on the bleeding edge of process technology.

Typical requirements: a minimum of 9+ years of relevant experience and a Master in Electronics Engineering.

Responsibilities

• Lead towards Memory Design Validation of SRAM, Multi-Ports, Register File, TCAM, and ROM memory compilers as well as custom macros in 2nm and other cutting edge process technologies.
• Perform functional verification, root cause design discrepancies, and help resolve them.
• Perform signal integrity analysis, identify design weaknesses, and propose possible solutions to address them.
• Perform transistor level simulations to check for any Power Up or Lock up issues and help resolve them.
• Perform EM/IR analysis/simulations and evaluate impact on timing and internal margins.
• Perform transistor level simulations to validate timing and internal margins, identify timing characterization holes, and help resolve them.
• Perform various QA and validation checks to ensure accurate timing and power models.
• Develop scripts to automate verification flow and data analysis.
• Support silicon debugs and correlation to spice models.
• Coordinate with memory design leads, modelling leads, and managers to define and execute on the memory validation plan.

Qualifications & Skill Sets

• Strong expertise in development of memory macros of all types and architectures.
• Strong understanding of transistor level circuit behavior and analysis.
• Good understanding of the layout and their related challenges in sub nanometer process technologies.
• Good understanding of signal integrity, EM/IR, and reliability analysis.
• Good understanding of memory behavioral and physical models.
• Proficient in DFT Schemes and chip level integration.
• Proficient in running transistor level simulators, writing automation scripts, and tool savvy.
• Hands‑on experience in using Cadence schematic/layout editor tools.
• Hands‑on experience with transistor level simulators, Monte Carlo variation analysis, waveform viewer tools such as HSPICE, Spectre, XA, PrimeSim, XARA, nWave, waveform viewer, etc.
• Experience in Skill/Perl/Python scripting.
• Good communication, interpersonal, and leadership skills.
• Good debugging skills, problem solving and logical reasoning skills.
• Motivated, self‑driven and good at multi‑tasking.

EEO Statement

Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.