Sr IP/CPU RTL Design Lead - CPU Team

AMD; Bengaluru Urban; On-site; INR 4,000,000 - 9,000,000; Full time

Benefits offered by this job

Hybrid work model

Job summary

AMD is hiring for an SMTS Silicon Design Engineer in Bengaluru. You will design RTL for high-performance x86-core ISA features, drive power management and cache coherency, and optimize RTL with low power techniques.

Lead the RTL deliverables, mentor juniors, and coordinate with DFT, Physical Design, and SOC teams to resolve integration issues. Strong Verilog RTL experience and front-end EDA tool fluency are required.

Qualifications

• 12+ years of experience in Digital IP/ASIC design and Verilog RTL development.
• Experience in full IP design cycle, requirements definition, architecture and microarchitecture specification.
• RTL design verification, design quality checks, synthesis, timing closure and post silicon validation.
• Expert on Verilog RTL design and multiscale digital IP/ASIC projects.
• Front-end EDA tools sign-off and its flows.
• Familiarity with low power design and low power flow is an added plus.
• Python or Perl scripting is a plus.
• Strong interpersonal skills, leadership and teamwork.
• Excellent English writing and documentation.
• Understanding of engineering terminology in the semiconductor industry.
• Knowledge of functional design verification or design is highly desired.

Responsibilities

• RTL design of high performance x86-core ISA features and clock/reset/power features.
• Architect and design power management features, cache, coherency.
• Design optimization for power efficient IP using low power techniques.
• Resolve inter-IP integration issues.
• Own Clock-Domain crossing and linting for the IP and subsystem.
• Collaborate with DFT, Physical Design and SOC teams.
• Architect and document design features; guide implementation ideas.
• Lead the RTL deliverables and mentor junior team members.
• Represent AMD to external technical community and partners.
• Demonstrate commitment to innovation and timely task completion.

Skills

Verilog RTL design

Digital IP/ASIC design

RTL verification

Synthesis & timing closure

Front-end EDA tools

Low power design

Python/Perl scripting

Leadership & mentoring

Technical writing

Clock-domain design

Inter-IP coordination

Education

Master’s degree in Electrical/Electronics Engineering, Computer Engineering, or VLSI design

Tools

EDA sign-off tools

Job description

ADVANCE YOUR CAREER. ADVANCE THE WORLD.

At AMD, we believetechnology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMDis shapingthefuture.

Whetheryou’redesigning next-gen processors, enabling AI breakthroughs, orbringing leading edge products to market, every role at AMD contributes to something bigger— technologythat moves the world forward.Join us and, together, we’ll advance your career.

SMTS SILICON DESIGN ENGINEER

THE PERSON:

You have a passion for modern, complex processor architecture, digital design as well as verification/design quality. You are a team player who has excellent communication skills, strong analytical & problem-solving skills and are willing to learn and ready to take on problems. A global mindset and ability to work in a multi – site environment are keys to being successful in this role.

KEY RESPONSIBILITIES:

• RTL design of high performance x86-core ISA features, clock/reset/power features of processor, IP Integration, sub-system level design
• Architect and design of power management features, cache, coherency.
• Design optimization for implementing power efficient IP, implementing the RTL using low power techniques
• Responsible for the inter IP integration issues resolution
• Own the Clock-Domain crossing, Linting aspects of the overall design of the IP and the subsystem.
• Work closely with DFT, Physical Design and SOC teams to incorporate the interdisciplinary feedback into the design
• Architecting, micro-architecting and documentation of the design features
• Lead design team from all aspects of the RTL deliverables.
• Mentor the junior members of the RTL team to meet the team goals
• Represents AMD to the outside technical community, partners and vendors
• Your commitment to innovating as a team demonstrated through excellent communication, knowledge of proper documentation techniques, and independently driving tasks to completion.

PREFERRED EXPERIENCE:

• 12+ years of experience in Digital IP/ASIC design and Verilog RTL development
• Experience in full IP design cycle, requirements definition, architecture and microarchitecture specification.
• Should be well versed with RTL design verification, design quality checks, synthesis, timing closure and post silicon validation.
• Expert on Verilog RTL design and has experience of multiscale digital IP/ASIC projects.
• Should possess expertise in front-end EDA tools sign-off and its flows.
• Familiarity with low power design and low power flow is an added plus.
• Ability to program with scripting languages such as Python or Perl is a plus;
• Highly motivated to seek out solutions and willing to learn new skills to fulfill job requirements;
• Proven interpersonal skills, leadership and teamwork;
• Excellent writing skills in the English language, editing and organizational skills required;
• Skilled at prioritization and multi-tasking;
• Good understanding of engineering terminology used within the semiconductor industry;
• Good understanding of digital design concepts;
• Knowledge of, or experience in, functional design verification or design is highly desired.

ACADEMIC CREDENTIALS:

Master’s degree preferred with emphasis in Electrical/Electronics Engineering, Computer Engineering, or VLSI design Engineering.

#LI-RR1

#LI-Hybrid

Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.