Sr Application Engineer

Cadence Design Systems, Inc.; Bengaluru; On-site; INR 900,000 - 1,500,000; Full time

Job summary

Cadence Design Systems in Bengaluru seeks an experienced layout engineer to work with customers, identify opportunities, and drive the evaluation and deployment of Cadence Virtuoso in production. The role requires deep knowledge of analog layout, advanced node constraints, and collaboration with R&D for feature implementation and bug fixes.

Strong communication and leadership are essential to success. The candidate will engage across teams to ensure designs meet foundry requirements and

Qualifications

• B.Tech or equivalent with 3 to 5 years of relevant experience.
• Strong understanding of IC design technology and foundry processes.
• Hands-on experience with Cadence Virtuoso and analog layout.

Responsibilities

• Meet customers/prospects to identify and qualify opportunities.
• Drive evaluation and deployment of Cadence tools to production.
• Collaborate with R&D and Product Engineering on features and bug fixes.
• Demonstrate leadership and communicate effectively to resolve issues.

Skills

Cadence Virtuoso

Analog layout

Layout automation

Advance node knowledge

Education

B.Tech or equivalent

Tools

Cadence CustomIC

Job description

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

JD for Virtuoso Layout req Your role will be to meet customers/prospects and identify & qualify the opportunities, work out agreeable, equally importantly achievable, evaluation criteria, run through the evaluation and convert the opportunities into business and help customers to deploy the tool and get it running into production at the earliest. It requires a very good understanding of customer flow and a good analytical ability to resolve issues impacting production schedule. Hands-on knowledge of Advance Node layout and design rules would be a plus.

The role demands a close interaction with R&D and Product Engineering team for implementation of new features and bug fixes.

As the job requires an extensive interaction with customers for issue resolution and identifying opportunities to proliferate Cadence technologies, at the same time a closer interaction with R&D and other stakeholders, it demands an excellent customer and communication skills, and the leadership qualities.

This position requires solid understanding of IC design technology and foundry process/methodology in analog layouts. It is essential to have a very good understanding of analog layout design fundamentals, advance node virtuoso techfile constraints and in-depth knowledge and hands-on experience on writing skill scripts to perform various layout automation tasks. The candidate should have knowledge of complete analog back-end flow from top level floorplanning down to complex block level layouts, physical verification, extraction, EMIR analysis etc, with proficiency in Cadence layout tools specifically Virtuoso with advance node exposure. Prior Design experience using Cadence CustomIC Physical Design tools (Virtuoso) and flows including chip integration and signoff is an added advantage.

• B.Tech or equivalent with 3 to 5 years of relevant experience

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