SoC Verification Engineer

LeadSoc Technologies Pvt Ltd; Bengaluru; On-site; INR 1,200,000 - 2,000,000; Full time

Benefits offered by this job

Competitive compensation

Career growth opportunities

Job summary

LeadSoc Technologies Pvt Ltd is looking for a highly skilled SoC Verification Engineer to join their silicon design team in Bengaluru, India. In this position, you will be responsible for driving the verification of complex SoCs, ensuring functionality, performance, and reliability in memory subsystems.

The ideal candidate will have 5–10 years of experience in SoC/ASIC verification, a strong grasp of DDR protocols, and familiarity with verification tools such as SystemVerilog and UVM. Competitive compensation and opportunities for career growth await the right candidate.

Qualifications

• 5–10 years of hands-on experience in SoC/ASIC verification.
• Strong expertise in DDR protocols (DDR4/DDR5, LPDDR4/LPDDR5).
• Solid understanding of memory controllers and bus protocols (AXI, AHB).

Responsibilities

• Own verification strategy and execution for DDR subsystems within large-scale SoCs.
• Develop test plans and verification environments for DDR protocols.
• Debug complex issues across RTL, simulation, and emulation platforms.

Skills

DDR verification

UVM

SystemVerilog

SoC architecture

Debugging tools

Education

Bachelor’s or Master’s degree in Electrical Engineering or Computer Engineering

Tools

Verification tools

Simulation tools

Emulation tools

Job description

We are seeking a highly skilled SoC Verification Engineer with deep expertise in DDR verification to join our world-class silicon design team. In this role, you will drive the verification of complex SoCs, ensuring robust functionality, performance, and reliability across memory subsystems. You will collaborate with cross‑functional teams to deliver next‑generation silicon solutions at scale.

Responsibilities

• Own verification strategy and execution for DDR subsystems within large‑scale SoCs.
• Develop test plans, verification environments, and coverage models for DDR protocols (DDR4/DDR5, LPDDR4/LPDDR5).
• Build and maintain UVM‑based verification environments, leveraging constrained‑random and directed testing.
• Collaborate with design, architecture, and validation teams to identify corner cases and ensure comprehensive coverage.
• Debug complex issues across RTL, simulation, and emulation platforms.
• Drive automation and scalability in verification flows to accelerate project timelines.
• Mentor junior engineers and contribute to best practices in verification methodology.

Basic Qualifications

• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field.
• 5–10 years of hands‑on experience in SoC/ASIC verification.
• Strong expertise in DDR protocols (DDR4/DDR5, LPDDR4/LPDDR5).
• Proficiency in SystemVerilog, UVM, and industry‑standard verification tools.
• Solid understanding of SoC architecture, memory controllers, and bus protocols (AXI, AHB).
• Experience with simulation, emulation, and debugging tools.

Preferred Qualifications

• Experience with pre‑silicon and post‑silicon validation of DDR subsystems.
• Familiarity with low‑power verification techniques and multi‑clock domain designs.
• Exposure to formal verification and assertion‑based methodologies.
• Proven track record of delivering verification closure at advanced technology nodes.

Why Join Us

• Work on cutting‑edge SoCs powering next‑generation products.
• Collaborate with world‑class engineers in a fast‑paced, innovative environment.
• Opportunity to own critical verification flows and influence design decisions.
• Competitive compensation, benefits, and career growth opportunities.