Senior Staff Engineer, CAD & Methodology

Renesaselectronics; Bengaluru; On-site; INR 3,200,000 - 4,600,000; Full time

Job summary

Renesas Electronics is seeking a highly motivated CAD & Methodology Engineer to drive scalable design automation for Backend Physical Design teams in Bengaluru. The role emphasizes enabling efficient RTL-to-GDSII implementation and signoff by maintaining reference flows, developing automation, and standardizing methodologies.

You will collaborate with Physical Design, Timing, Signoff, EDA vendors, IT infrastructure, and Foundry partners to ensure seamless tool deployment and predictable tapeouts

Qualifications

• 10+ years in Physical Design CAD, Design Methodology, or Backend Design Automation.
• Bachelor's or Master's degree in Electronics or Electrical Engineering.
• Strong RTL-to-GDSII implementation and signoff methodologies.
• Hands-on experience with industry-standard EDA tools (Synopsys, Cadence, Siemens).
• Proficiency in Tcl, Python, Shell, or Perl scripting.
• Experience developing CAD automation and methodology solutions for backend design teams.

Responsibilities

• Develop, maintain, and release reference flows for Synthesis, STA, Place & Route, and Signoff.
• Build automation to improve productivity, including setup generation, QoR checks, report parsing, ECO automation, and deliverable packaging.
• Define and enforce methodology standards, flow validation, and QoR compliance checks.
• Qualify and deploy EDA tools, PDKs, libraries, and signoff runsets across compute environments.
• Provide technical support and root-cause analysis for flow, tool, and infrastructure issues through tapeout.
• Collaborate with Physical Design teams, IT, EDA vendors, and Foundry partners to drive flow improvements and issue resolution.

Skills

Physical Design CAD

Design Methodology

Backend Design Automation

Tcl

Python

Shell

Perl

Education

Bachelor's or Master's in Electronics or Electrical Engineering

Tools

Synopsys

Cadence

Siemens

Job description

We are seeking a highly motivated CAD & Methodology Engineer to drive the development, deployment, and support of scalable design automation infrastructure for Backend Physical Design teams. The role focuses on enabling efficient, repeatable, and high-quality RTL-to-GDSII implementation and signoff by maintaining robust reference flows, developing automation solutions, and driving methodology standardization across projects.

The ideal candidate will work closely with Physical Design, Timing, Signoff, EDA vendors, IT infrastructure teams, and Foundry partners to ensure seamless tool deployment, optimized design methodologies, and predictable project execution through tapeout.

Key Responsibilities

• Develop, maintain, and release reference flows for Synthesis, STA, Place & Route, and Signoff.
• Build automation to improve productivity, including setup generation, QoR checks, report parsing, ECO automation, and deliverable packaging.
• Define and enforce methodology standards, flow validation, and QoR compliance checks.
• Qualify and deploy EDA tools, PDKs, libraries, and signoff runsets across compute environments.
• Provide technical support and root-cause analysis for flow, tool, and infrastructure issues through tapeout.
• Collaborate with Physical Design teams, IT, EDA vendors, and Foundry partners to drive flow improvements and issue resolution.

Qualifications

• 10+ years of experience in Physical Design CAD, Design Methodology, or Backend Design Automation.
• Bachelor's or Master's degree in Electronics, Electrical Engineering.
• Strong understanding of RTL-to-GDSII implementation and signoff methodologies.
• Hands‑on experience with industry‑standard EDA tools from Synopsys, Cadence, and/or Siemens.
• Proficiency in Tcl, Python, Shell, or Perl scripting.
• Experience developing CAD automation and methodology solutions for backend design teams.

Preferred Skills

• Experience with advanced technology nodes (7nm and below).
• Knowledge of PDK, library, and runset enablement.
• Familiarity with compute farms, Linux environments, Git, and CI/CD frameworks.
• Strong problem‑solving and cross‑functional collaboration skills.

Join us to drive design automation, methodology innovation, and successful tapeouts across cutting‑edge semiconductor products.

Renesas is an embedded semiconductor solution provider driven by its Purpose, To Make Our Lives Easier . With a global team of over 21,000 engineers and problem solvers in more than 30 countries, we offer the opportunity to work on world‑leading technology for Automotive, Industrial, Infrastructure, and IoT, shaping a safer, healthier, greener, and smarter future.

At Renesas, TAGIE is our culture, grounded in being Transparent, Agile, Global, Innovative, and Entrepreneurial. It shapes how we work, grow and deliver on our purpose together. This collaborative spirit and mindset drive our semiconductor technology to transform industries and impact millions of lives.

We believe in rewarding our employees with a competitive benefits package alongside their salary. More information will be provided during the hiring process.

Are you ready to join our team and shape the future with us?

Renesas Electronics is an equal opportunity and affirmative action employer, committed to supporting diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by law. For more information, please read our Diversity & Inclusion Statement .