Sr Engineer, Physical Design

Renesas Electronics; Dadri; On-site; INR 1,000,000 - 1,500,000; Full time

Benefits offered by this job

Flexible work environment

Remote work option

Career advancement opportunities

Job summary

A leading semiconductor company in India is seeking an experienced Physical Design Engineer to join their backend team. This role involves working on RTL synthesis, LEC closure, UPF development, and collaborating with various teams on complex SoC designs. The ideal candidate should have over 5 years of experience, preferably with strong skills in TCL scripting and knowledge of tools like Cadence Genus and Synopsys Fusion Compiler. The company offers a flexible work environment and aims to support employee wellbeing.

Qualifications

• 5+ years of experience in physical design cycle.
• 2+ years of hands-on experience with SoC designs.
• Strong TCL scripting skills. Perl/Python a plus.

Responsibilities

• Perform RTL synthesis and finalize sign-off.
• Debug logic equivalence checks (LEC).
• Automate processes using TCL scripting.

Skills

TCL scripting

RTL synthesis

Low-power design

Tools

Cadence Genus

Synopsys Fusion Compiler

Conformal

Stylus

VCLP

Job description

Company Description

Renesas is one of the top global semiconductor companies in the world. We strive to develop a safer, healthier, greener, and smarter world, and our goal is to make every endpoint intelligent by offering product solutions in the automotive, industrial, infrastructure and IoT markets. Our robust product portfolio includes world leading MCUs, SoCs, Analog and power products, plus Winning Combination solutions that curate these complementary products. We are a key supplier to the world’s leading manufacturers of electronics you rely on every day; you may not see our products, but they are all around you.

Job Description

We are seeking a skilled Physical Design Engineer with experience in the physical design cycle, including synthesis, UPF, VCLP, and LEC to join our semiconductor backend team. The role focuses on performing RTL synthesis, LEC closure, UPF development, and VCLP analysis for complex SoC designs, working closely with Physical Design, DFT, and Front‑End teams.

Experience: 5+ years

Key Responsibilities

• Exposure to RTL synthesis from elaboration to final sign‑off.
• Understand Physical design cycle and handshaking across teams.
• Perform and debug logic equivalence checks (LEC) across RTL, synthesized, and ECO netlists.
• Create, maintain, and understand UPF, ensuring alignment with FE power intent.
• Exposure to low power checks.
• Automate flows using TCL scripting.

Required Qualifications

• 2+ years of hands‑on experience in Physical design for SoC designs.
• Exposure to synthesis process, and low‑power design.
• Hands‑on experience with UPF creation and power‑domain modelling.
• Tool Exposure: Cadence Genus, Stylus, Synopsys Fusion Compiler, Conformal, VCLP.
• Strong TCL scripting skills (Perl/Python is a plus).

Preferred Qualifications

• Advanced node experience (7nm / 5nm or below).
• Exposure to physical‑aware synthesis.
• Understanding of UPF modelling constructs.

Additional Information

Renesas is an embedded semiconductor solution provider driven by its Purpose ‘To Make Our Lives Easier’. As the industry’s leading expert in embedded processing, we provide scalable and comprehensive semiconductor solutions for automotive, industrial, infrastructure, and IoT industries.

Benefits

• Launch and advance your career in technical and business roles across four Product Groups and various corporate functions.
• Make a real impact by developing innovative products and solutions to meet our global customers' evolving needs.
• Maximize your performance and wellbeing in our flexible and inclusive work environment, with remote work option and Employee Resource Groups.

EEO Statement

Renesas Electronics is an equal opportunity and affirmative action employer, committed to supporting diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by law. For more information, please read our Diversity & Inclusion Statement.