Senior Staff Engineer

Samsung; Bengaluru; On-site; INR 2,500,000 - 4,000,000; Full time

Job summary

Samsung Semiconductor India Research (SSIR) in Bengaluru seeks a Design Verification Engineer to own IP DV verification and coordinate across locations. You will develop testbenches for IP/Subsystems/SoC and lead verification activities end-to-end.

The role requires hands-on DV expertise with UVM, SystemVerilog, and SystemC; familiarity with AXI/PCIe/UCIe is valued. A strong lead capability is desired.

Qualifications

• Experience in developing test benches for IP/Subsystems/SoC.
• In-depth DV verification of SoC/Sub System/IP.
• Ability to lead IP DV projects and guide a team.
• Hands-on with verification tools and DV methodologies (UVM, SystemVerilog, CDV/MDV).
• Domain expertise in AXI/PCIe/UCIe is preferred.
• Experience with Hybrid testbenches (SV, SystemC, Python) is desirable.

Responsibilities

• Own IP DV verification ownership and drive verification activities.
• Collaborate with cross-functional teams across geos.
• Develop testbenches and DV infrastructure; create test plans.
• Lead DV signoffs and ensure DV coverage goals are met.

Skills

IP DV

Test benches

SoC DV

UVM

SystemVerilog

Python

SystemC

AXI

PCIe

UCIe

Education

B.Tech/B.E/M.Tech/M.E

Tools

UVM

SystemVerilog

CDV/MDV

DV signoffs

Job description

Position Summary

About Samsung Semiconductor India Research (SSIR)

With a wide range of industry-leading semiconductor solutions, we are enabling innovative growth in market segments in component solutions, featuring industry-leading technologies in System LSI, Memory and Foundry. Our engineers are offered a foundation to work on cutting-edge technologies such as Foundation IP Design, Mobile SoCs, Storage Solutions, AI/ML, 5G/ 6G solutions, Neural processors, Serial Interfaces, Multimedia IPs and much more.

As one of the largest R&D centers outside Korea for Samsung Electronics, we take pride in our ability to work on some of the cutting edge technologies. Our engineers get to work across diverse domains, projects, products, clients, people and countries, and conduct research in new and emerging technology areas. Innovation and creativity are highly valued at this innovation hub, as we strive towards providing high reliability; high performance and value added services that enable Samsung Electronics deliver world-class products.

Role and Responsibilities

Position: Design Verification Engineer

Roles and Responsibilities

Independent Verification Ownership of IP DV. Collaborating with various cross functional teams at multiple geo locations as part of execution. Expected to work hands on to close all aspects of verification activities including Testplan creation, building testbenches based on standard DV methodology, developing DV Infrastructure (Coverage/Regression/Simulation Scripts)

Domain: AXI, PCIe, UCIe protocol experience is highly preferred

Skills

• Must have experience in developing test benches for IP/Subsystems/SoC.
• In depth knowledge and hands on experience in the execution of verification of SoC/Sub System/IP DV.
• Previous experience of independently driving IP DV projects from ability to lead a team by providing technical guidance, as well as be part of execution by debugging and SoC architecture understanding capabilities.
• Strong hands on experience with common verification tools and methodology including UVM/ System Verilog/CDV/MDV, DV signoffs.
• Must have a strong domain expertise in one or more following areas - AXI/PCIe/UCIe.
• Experience in Hybrid testbenches (SV, SystemC, Python) and SystemC based reference model test vectors/stimulus based verification is desirable.

Experience - 7 to 10 Years of experience

Qualifications

B.Tech/B.E/M.Tech/M.E

Disclaimer

Samsung Semiconductor India Research (SSIR), a division of Samsung R&D India - Bangalore Pvt. Ltd is dedicated to employing a diverse workforce and providing Equal Employment Opportunity to all individuals, regardless of their religion, gender, age, marital status, gender identity, status as a protected veteran, genetic information, status as a qualified individual with a disability, or any other characteristic protected by law.

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