Senior SoC Design Engineer

NVIDIA Corporation; Bengaluru; On-site; INR 2,000,000 - 3,000,000; Full time

Job summary

NVIDIA is seeking a Senior SoC Design Engineer to design the next-generation SoCs in Bengaluru. You will drive cross-functional collaboration across architecture, verification, and post-silicon teams to ensure first-pass silicon success.

You will lead SoC-level reviews, LD/RTL build flows, and IP integration while mentoring junior engineers. Strong Verilog/SystemVerilog and AMBA protocol experience are essential.

Qualifications

• Bachelor’s or Master’s degree in Electronics and Communication Engineering or Electrical Engineering.
• 3–12 years of hands-on SoC design experience with Verilog/SystemVerilog and AMBA protocol knowledge.
• Strong coding skills in Perl or Python; experience with RTL build flows and synthesis is a plus.

Responsibilities

• Drive SoC execution with multi-functional teams to define, track and drive dependencies.
• Oversee SoC assembly, linting, reviews, and signoffs across connectivity, CDC, and validation.
• Collaborate across architecture, SW/FW, design, modeling, verification, emulation, and post-silicon validation.

Skills

Verilog/SystemVerilog

AMBA protocols (AXI/AHB/APB)

RTL Build flows

Synthesis

SoC architecture knowledge

Debugging

Perl

Python

Education

Bachelor’s or Master’s degree in Electronics and Communication Engineering or Electrical Engineering

Tools

Perl

Python

Job description

NVIDIA is seeking a Senior SoC Design Engineer to design the next-generation SoCs. We are looking for special individuals to deliver innovative products. Together, we will build the next generation of life-changing SoCs. If you are a motivated individual who understands how complex SOC and Subsystems are built, has intimate knowledge of client requirements, and understands various development cycles, this is your place to be.

What you'll be doing:

• Drive SOC execution working with all multi-functional teams to define, track and drive dependencies working closely with the SoC verification, DFT, STA, Low Power and Validation teams.
• Drive SoC Assembly, SoC level quality checks, Connectivity reviews and signoff, SoC level Lint and CDC, Bug Triaging, Code reviews and ECOs.
• Participate in silicon architecture, micro-architecture reviews, collaborate with Architecture, SW/FW, Design, Modeling, Verification, Emulation, and Post-Silicon Validation teams to ensure comprehensive first-time right SoC design.
• Collaborate with IP development teams, and participate in, and support soft and hard IP identification, selection and IP licensing.
• Identify candidates, hire, and mentor SoC Design engineers, and as a team, identify problems and inefficiencies in the process and propose solutions.

What We Need To See:

• Bachelor's or Master's degree or equivalent experience in Electronics and Communication Engineering or Electrical Engineering.
• 3-12 years of hands on SoC Design experience, expertise in Verilog/System-Verilog, Knowledge of AMBA protocols - AXI, AHB, APB, SoC Clocks/RST/Debug architecture and sound understanding of peripherals ( USB, PCIE and SDCC)
• Strong coding skills in Perl, Python, or other industry-standard scripting languages.
• Experience in RTL Build flows and Makefiles, Synthesis is a plus.
• Experience working with SoC level floorplan team is an added advantage.
• Background in developing tools and infrastructure using Perl or Python.
• Excellent analytical and problem-solving skills.

We are an equal opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, color, national origin, sex, gender, gender expression, sexual orientation, age, marital status, veteran status, or disability status. We will ensure that individuals with disabilities are provided reasonable accommodation to participate in the job application or interview process, to perform essential job functions, and to receive other benefits and privileges of employment. Please contact us to request accommodation.