Senior Verification Engineer, Switch SoC

NVIDIA Gruppe; Bengaluru; On-site; INR 2,500,000 - 3,500,000; Full time

Job summary

NVIDIA Bengaluru is seeking a senior SoC development engineer to lead project milestones, define system-level methodologies and drive cross-functional teams toward SOC execution.

You will work on tape-outs, RTL, verification, and design automation with Verilog, Cadence tools, and scripting in Python or Perl. Hybrid work model in Bengaluru with competitive compensation.

Qualifications

• BS (or MS) with 4+ years of practical semiconductor design and architecture experience.
• Experience with all phases of SOC development in multiple ASIC projects, including architecture, RTL, verification, timing closure and physical design.
• Exposure to design and verification tools such as Verilog/SV, Cadence, and debugging tools.
• C/C++ or Python scripting experience is desirable.
• Collaborate with software teams to define HW/SW interfaces, interrupts and error handling.
• Hands-on tape-out experience of complex, high-volume SoCs in advanced nodes.
• Familiarity with RTL build and design automation is a plus.

Responsibilities

• Define project milestones based on internal roadmaps and track them in an agile framework.
• Develop system-level methodologies, tools, and IPs to build SOCs efficiently and scalably.
• Lead SOC assembly and drive cross-functional teams toward milestone execution.
• Integrate components for defined milestones and hand over for verification at multiple levels.
• Collaborate with software teams to ensure HW/SW interfaces are well-defined.

Skills

SoC development

RTL design

Verification

C/C++

Python

Cross-functional teamwork

Communication skills

Tape-out experience

Education

BS or MS in semiconductor design

Tools

Cadence

Indago

GDB

Verilog/SV

Job description

What you'll be doing:

• You are encouraged to understand all features of a given project and define project milestones based on internal roadmaps, assign them and track them through agile framework
• Define and develop system-level methodologies, tools, and IPs to build SOCs in an efficient and scalable manner.
• Work on SOC Assembly and drive cross-functional teams towards SOC milestone execution.
• Be responsible for integrating all the pieces for a given defined project milestone and deliver the model to relevant teams for further verification at cluster/sub-system/SOC/emulation levels.
• Have good grasp of Perl, Python, or other industry-standard scripting languages.

What we need to see:

• BS (or equivalent experience) / MS with 4+ years of practical semiconductor design and architecture experience building complex SoC’s.
• Must have firsthand experience & solid understanding of all phases of SOC development in multiple ASIC projects including ASIC architecture, Micro-Architecture, RTL design, verification, timing closure & Physical design.
• Exposure to design and verification tools (Verilog/SV or equivalent, Cadence or equivalent simulation tools, debug tools like Indago, GDB etc.).
• C/C++ programming or python or any other industry-standard scripting language experience desirable.
• Experience working with software teams to tightly define the HW/SW interface including control/status registers, interrupt and error handling.
• Hands on experience in successful tape outs of multiple complex, high-volume SoCs in advanced process nodes.
• Exposure to various Chip Design Functions to be able to collaborate and solve complex cross functional problems.
• Excellent verbal and written communication skills to interact with cross functional teams to build consensus.
• Good teamwork spirit and collaboration skills with team members.
• Experience in synthesis, physical design and DFT is a plus.
• Background in RTL Build and Design Automation is a plus.

Ways to stand out from the crowd:

• Chip lead type of technical leadership experience on delivering complex SOCs for enterprise and/or HPC applications.
• Experience in RTL coding and debug, as well as performance/power/area analysis and trade-offs
• Experience working closely with physical design teams to develop highly optimized ASICs with excellent power, performance and area.
• Strong coding skills in Perl, Python, or other industry-standard scripting languages.

Widely considered to be one of the technology world’s most desirable employers, NVIDIA offers highly competitive salaries and a comprehensive benefits package. As you plan your future, see what we can offer to you and your family www.nvidiabenefits.com/

NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.

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