Senior Principal Verification Engineer

onsemi; Bengaluru; On-site; INR 1,200,000 - 1,800,000; Full time

Benefits offered by this job

Comprehensive company benefits

Innovative work environment

Focus on professional development

Job summary

onsemi seeks a Senior Principal ASIC/SoC Verification Engineer to join our dynamic engineering team in Bengaluru, India. The role involves ensuring the functional correctness and quality of semiconductor designs through advanced verification methodologies and collaboration with diverse teams.

The ideal candidate has a strong expertise in ASIC/SoC verification, particularly in SystemVerilog, and possesses effective communication skills. This position offers a chance to contribute to innovative technologies that shape the future.

Qualifications

• Strong background in ASIC/SoC verification procedures.
• Proficient in SystemVerilog and related technologies.
• Experience with industry-standard verification methodologies.

Responsibilities

• Develop and execute SoC verification plans aligned with project goals.
• Drive functional and coverage closure for high-quality deliveries.
• Collaborate with teams for seamless VIP integration and compliance.

Skills

SystemVerilog (UVM/OVM)

Scripting languages (Python, Perl, Tcl)

C/C++

Verilog PLI

ASIC/SoC verification methodologies

Debug and simulation tools from EDA vendors

Tools

SystemVerilog

Simulation tools (Synopsys, Cadence, Siemens)

Job description

Job Description

We are seeking an experienced Senior Principal ASIC/SoC Verification Engineer to join our dynamic and fast‑paced engineering team. In this role, you will be responsible for ensuring the functional correctness, robustness, and overall quality of our cutting‑edge semiconductor and SoC designs. If you thrive in a collaborative environment and enjoy solving complex technical challenges, this opportunity is an excellent fit.

Responsibilities

• Verification Planning and Execution: Develop and execute comprehensive SoC/IP‑level verification plans aligned with design specifications and project goals.
• Drive verification closure through functional, code, and assertion coverage, ensuring high‑quality deliverables.
• Apply industry‑standard ASIC/SoC verification techniques including test planning, testbench creation, constrained‑random and directed stimulus, assertions, and coverage‑driven verification.
• Perform SoC integration verification, validating interactions across subsystems, interfaces, and power/performance domains.
• Testbench & Environment Development: Architect, develop, and enhance SystemVerilog UVM/OVM‑based testbenches for IP and SoC‑level verification.
• Build and integrate reusable Verification IP (VIP) and scalable verification components.
• Collaborate with internal teams and third‑party VIP providers to ensure seamless integration and compliance.
• Develop checkers, scoreboards, monitors, and coverage models to support robust verification.
• Methodology, Flows & Best Practices: Demonstrate strong understanding of ASIC/SoC design and verification methodologies, including constraint‑random verification and object‑oriented programming principles.
• Contribute to verification methodology improvements, automation, and flow optimization.
• Ensure adherence to best practices in UVM architecture, reuse, and maintainability.
• Advanced Verification Skills: Perform Gate‑Level Simulation (GLS) including SDF annotation, timing verification, and debug of post‑synthesis/post‑layout issues.
• Execute power‑aware verification using UPF/CPF, validating power modes, isolation, retention, and sequencing.
• Debug complex SoC‑level issues involving multiple clock domains, resets, and power states.
• Apply formal verification techniques where appropriate to complement simulation‑based verification.
• Technical Skills: Strong proficiency in SystemVerilog (UVM/OVM) and scripting languages such as Python, Perl, Tcl, C/C++, and Verilog PLI.
• Familiarity with standard protocols and interfaces (e.g., I2C, SPI, UART, AXI/AHB/APB).
• Experience with simulation, debug, and coverage tools from major EDA vendors (Synopsys, Cadence, Siemens).
• Knowledge of CI/regression automation, version control, and workflow tools is a plus.
• Collaboration & Communication: Work effectively with design, architecture, DV, validation, and firmware teams to drive verification to completion.
• Communicate technical concepts clearly through documentation, reviews, and cross‑functional discussions.
• Demonstrate initiative, strong analytical problem‑solving skills, and adaptability in a diverse team environment.

Qualifications

Relevant experience and technical skills include, but are not limited to, a strong background in ASIC/SoC verification and expertise in SystemVerilog, scripting languages, and verification methodology. Candidates should possess demonstrated experience with industry tools and methodologies outlined above.

About the Company

onsemi (Nasdaq: ON) is driving disruptive innovations to help build a better future. With a focus on automotive and industrial end‑markets, the company is accelerating change in megatrends such as vehicle electrification and safety, sustainable energy grids, industrial automation, and 5G and cloud infrastructure. With a highly differentiated and innovative product portfolio, onsemi creates intelligent power and sensing technologies that solve the world’s most complex challenges and leads the way in creating a safer, cleaner, and smarter world.

More details about our company benefits can be found here: https://www.onsemi.com/careers/career-benefits

About The Team

We are committed to sourcing, attracting, and hiring high-performance innovators, while providing all candidates a positive recruitment experience that builds our brand as a great place to work.