Senior Principal SI/PI engineer

Cadence; Bengaluru; On-site; INR 4,000,000 - 6,000,000; Full time

Job summary

Cadence is seeking a Senior Principal SI/PI Engineer to join the HPP IP R&D Group in Bengaluru. You will be a hands-on contributor responsible for SI/PI optimization, verification, and measurement on test chips and evaluation boards.

You will provide channel models, collaborate on design guidelines, and assist customers with SI/PI inquiries to ensure top IP performance in ASIC integrations.

Qualifications

• MS or PhD in Electrical Engineering.
• 9+ years of experience in high speed SerDes and PHYs.
• Experience with high speed SerDes architectures.
• Hands-on lab experience with high-speed instruments.
• Fluency with 3D/2.5D extraction tools like Sigrity Clarity/PowerSI or Ansys HFSS/SIwave.
• Experience with IBIS-AMI model simulations.
• Understanding PCB/FCBGA design rules.

Responsibilities

• Work on test chip package design SI/PI optimization and verification.
• Design optimization for evaluation boards for SI/PI performance.
• Provide extracted and measured channel models for chip designers.
• Help with package and PCB SI/PI design guidelines and customer support.
• Review customer package and board designs and simulation results; provide feedback for IP performance.
• Run link performance simulations using S-parameter models and IBIS-AMI.
• Assist with SI/PI debugging of test chips or customer ASICs in the lab.

Skills

Strong debugging & problem solving

Excellent communication & presentation

Hands-on lab experience

Education

MS or PhD in Electrical Engineering

Tools

Sigrity Clarity/PowerSI

Ansys HFSS/SIwave

IBIS-AMI model simulations

3D and 2.5D extraction tools

Job description

Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality. Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace industrial and health.

The Cadence Advantage

• The opportunity to work on cutting-edge technology in an environment that encourages you to be creative, innovative, and to make an impact.
• Cadence’s employee-friendly policies focus on the physical and mental well-being of employees, career development, providing opportunities for learning, and celebrating success in recognition of specific needs of the employees.
• The unique “One Cadence – One Team” culture promotes collaboration within and across teams to ensure customer success
• Multiple avenues of learning and development available for employees to explore as per their specific requirement and interests

You get to work with a diverse team of passionate, dedicated, and talented individuals who go above and beyond for our customers, our communities, and each other—every day

Principal SI/PI Engineer

This is a unique opportunity to join the HPP IP R&D Group at Cadence Design Systems.

We are looking for a Sr Principal SI/PI Engineer who will be a key contributor to our advanced high speed IP products. This is a hands-on technical position.

Main Job Tasks and Responsibilities:

• Work on test chip package design SI/PI optimization and verification.
• Work on evaluation board design optimization for best SI/PI performance.
• Provide extracted and measured channel models for chip designers in the R&D team.
• Help with package and PCB SI/PI design guidelines and customer support on SI/PI related inquiries.
• Review customer package and board designs and simulation results. Help with providing feedback to customers to ensure best possible performance of our IP in their ASIC.
• Work on link performance simulations using S-parameter channel models and IBIS-AMI behavioral models.
• Help with SI/PI related debug of test chips or customer ASICs in the lab.

Position Requirements:

• M.S. or Ph.D. Electrical Engineering (or similar degree)
• 9+ years of experience preferably working with high speed SerDes and PHYs
• Good understanding of high speed SerDes architecture
• Hands on lab experience with instruments like high speed oscilloscopes, TDRs, VNAs, spectrum analyzers, etc.
• Fluent with using 3D and 2.5D extraction tools like Sigrity Clarity/PowerSI or Ansys HFSS/SIwave
• Experience with IBIS-AMI model simulations
• Experience with simulation result to lab measurement correlation
• Good understanding of PCB and FCBGA design rules and requirements
• Strong debugging and problem-solving skills
• Excellent communication and presentation skills to effectively communicate with both customers and internal stake holders