Lead Product Engineer - Digital & Mixed Signal IP

Cadence Design Systems India Pvt Ltd

Bengaluru

On-site

INR 1,500,000 - 2,500,000

Full time

13 days ago
Application generator

Turn this role into an interview — a resume and cover letter built around what this employer wants.

Get past ATS filters

Job summary

Cadence Design Systems India Pvt Ltd in Bangalore is seeking a Lead Product Engineer to drive development of digital and mixed-signal IP, including UCIe, PCIe, USB, DPHY, and Ethernet PHYs. You will be the primary interface between customers and R&D, coordinating across remote teams to deliver high-quality IP solutions.

The role emphasizes strong communication, ownership of tasks, and ability to manage multiple priorities in a fast-paced environment.

Qualifications

  • Experience with UCIe, PCIe, Ethernet, and high-speed IP protocols.
  • Verilog RTL design and gate-level verification.
  • Synthesis and timing analysis familiarity.
  • DFT methodologies and test flows.
  • Ability to read schematics and review interfaces.

Responsibilities

  • Support IP integration and customization for SERDES IP.
  • Analyze complex issues and guide customers.
  • Assist PHY and SOC integration reviews.
  • Run RTL and gate-level simulations to verify functionality.
  • Support post-silicon bring-up and test activities.
  • Provide timely updates and maintain customer satisfaction.
  • Develop and maintain project documentation for customers.

Skills

Verilog RTL
UCIe/PCIe/Ethernet IP
Timing closure
DFT flows
Schematic reading

Education

Bachelor's in CS or EE
Master's in CS or EE

Tools

SFDC
Jira
PCB design

Job description

Lead Product Engineer

Location: Bangalore

About Us

Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise.

We apply our Intelligent System Design strategy to deliver software, hardware, and IP that turn design concepts into reality.

This strategy is supplemented by AI-augmented development practices throughout all our organizations to empower our team to focus on creative problem-solving and innovation.

Our customers are the world’s most innovative companies, delivering extraordinary electronic products—from chips to boards to systems—for dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace, industrial, and health.

Join us and be part of a culture that values innovation, collaboration, and customer success.

Position Overview

Join a growing and dynamic IP team and help lead the development of best in class digital and mixed signal IP products. This is a tremendous opportunity to work with an experienced team focusing on development of high-performance IP related to protocols such as UCIe, PCIe, USB, DPHY and Ethernet PHYs.

The role will be a key member of technical staff in an organization responsible for IP activities including but not limited to Pre‑sales engagement with potential customers, Pre‑Silicon integration and Post silicon bring‑up and test support for the customers.

This candidate will be the primary interface between customer and CDNS R&D team.

Candidate should possess strong communication skills with ability to manage multiple priorities on day‑to‑day basis. Ownership of tasks, ability to collaborate with remote teams located worldwide and clear communication of status, are must have attributes in this role.

Key Responsibilities
  • Responsible for supporting integration / customization of CDNS SERDES IP subsystems.
  • Analyze and resolve complex subsystem application or implementation issues and provide professional guidance to customers.
  • Support PHY and controller SOC integration reviews, and integration questions.
  • Perform RTL and gate level simulations to verify functionality.
  • Assist customers with gate level simulations and timing closure.
  • Participate in development of CDNS documentations and checklists for customers.
  • Support post silicon bringup and deployment activities by our customers.
  • Enhance customer experience by providing prompt updates to customers.
AI Incorporation

Leverage AI-powered tools and assistants to enhance productivity, improve decision making, and maintain high-quality customer deliverables.

Apply AI-powered analytics tools to extract insights, identify patterns, and generate actionable recommendations from complex datasets.

Position Requirements
  • Experience working with UCIe, PCIe, Ethernet, 112G or similar interface IP.
  • Verilog RTL design and gate level verification experience.
  • Synthesis and STA experience, back‑end experience is a plus.
  • Familiarity with industry standard DFT flows and test methodologies.
  • Familiarity with package and board design.
  • Ability to read schematics and participate in SI/PI reviews for customer board/package implementation.
  • Knowledge of circuits such as Phase Locked Loops, Tx and Rx Equalizers, ADC’s etc.
  • Familiar with concepts of Jitter, Noise, and other non‑idealities in circuits.
  • Bachelor’s in computer science or electrical engineering + 5 years of related experience, or Masters +3 years of related experience.
Skills & Qualifications
  • Broad technical background with understanding of standard design flows, tools, and usage of hard and soft IPs.
  • Strong communication and organizational skills.
  • Experience with case management systems (SFDC, Jira).
  • Ability to prioritize cases, anticipate escalations, and manage technical reviews.
  • High‑level understanding of technical issues; able to coordinate with subject matter experts.
  • Proactive in gathering feedback and driving continuous improvement.
  • Influential and collaborative, able to manage resources across the organization. Skilled at listening to customer concerns and identifying potential issues.
  • Committed to customer satisfaction and timely case closure.
Preferred Experience
  • Preferred Experience in memory and/or communication interface IP protocols (DDR, LPDDR, GDDR, HBM, PCIExpress, Ethernet, USB, UCIe, etc).
  • A general grasp of circuit architecture and design fundamentals.
  • Understanding of Analog/Mixed signal design practices.
  • Bachelor’s in computer science or electrical engineering + 8 years of related experience, or Masters + 5 years of related experience.
  • Experience with usage of AI tools in rapid prototyping and development (vibe coding) and general experience with effective AI prompting.

We’re doing work that matters. Help us solve what others can’t.

Experience Level Senior Level

Get your free, confidential resume review.
or drag and drop your file here.
Similar jobs

Similar jobs worth comparing

Senior Principal Firmware Engineer
Senior Principal Firmware Engineer

Cadence • Bengaluru

On-site
INR 3,500,000 - 5,400,000
Principal Design Engineer
Principal Design Engineer

Cadence • Hyderabad

On-site
INR 6,000,000 - 9,000,000
Principal Firmware Engineer
Principal Firmware Engineer

Cadence • Bengaluru

On-site
INR 4,000,000 - 6,000,000
Senior Analog Director- PCIe-Gen7 , UCIe
Senior Analog Director- PCIe-Gen7 , UCIe

Omni Design Technologies, Inc. • Bengaluru

On-site
INR 2,500,000 - 4,000,000
Senior Design Engineer - Analog and Digital Silicon Validation
Senior Design Engineer - Analog and Digital Silicon Validation

Cadence Design Systems India Pvt Ltd • Bengaluru

On-site
INR 1,800,000 - 3,000,000
Senior Design Architect - Digital and Physical IP
Senior Design Architect - Digital and Physical IP

Cadence Design Systems India Pvt Ltd • Bengaluru

On-site
INR 4,200,000 - 6,000,000
Principal Design Engineer
Principal Design Engineer

Cadence Design Systems • Hyderabad

On-site
INR 3,500,000 - 6,500,000
SoC Design Director
SoC Design Director

Mulya Technologies • Bengaluru

On-site
INR 5,500,000 - 9,500,000
Design Architect
Design Architect

Cadence Design Systems • Bengaluru

On-site
INR 350,000 - 650,000
Senior Technical Staff Engineer - Design
Senior Technical Staff Engineer - Design

FHLB Des Moines • Bengaluru

On-site
INR 4,500,000 - 7,500,000