Senior/Lead SoC Verification Engineer – Emulation & FPGA Prototyping

Qualcomm; Bengaluru; On-site; INR 3,000,000 - 6,000,000; Full time

Job summary

Qualcomm India Private Limited in Bengaluru seeks a Senior/Lead SoC Verification Engineer with 7+ years of ASIC/SoC/IP verification experience to drive verification across simulation, emulation, and FPGA prototyping environments.

The candidate will have deep SystemVerilog/UVM expertise, RTL debugging skills, and hands-on experience with hardware emulation, FPGA prototyping, and software-driven validation, collaborating with design, architecture, firmware, and software teams.

Qualifications

• 7+ years of ASIC/SoC/IP verification experience.
• Strong SystemVerilog/UVM and RTL debugging skills.
• Hands-on experience with emulation, FPGA prototyping and software-driven validation.
• Collaboration with design/architecture/firmware/software teams.

Responsibilities

• Develop and execute verification strategies for IP, subsystem, and SoC designs.
• Build scalable verification environments using SystemVerilog, UVM, SVA and coverage.
• Drive functional verification, regressions, debug, and verification closure.
• Debug complex RTL, testbench, firmware and system-level issues across platforms.
• Enable emulation, FPGA prototyping, software-driven validation and pre-silicon bring-up.
• Collaborate with cross-functional teams on system-level verification and validation.
• Improve productivity via automation and reusable verification infrastructure.
• Lead technical discussions and mentor junior engineers.

Skills

SystemVerilog/UVM

RTL debugging

Emulation

FPGA prototyping

Software-driven validation

Git

Regression automation

CI/CD workflows

Education

Bachelor's degree in Electrical/Electronics/Computer Engineering

Master's degree in Electrical/Electronics/Engineering

PhD in related field

Tools

Siemens Veloce/Veloce TBX

Cadence ZeBu

Palladium

Job description

Company:

Qualcomm India Private Limited

Job Area:

Engineering Group, Engineering Group > Hardware Engineering

General Summary:

We are looking for an experienced Senior/Lead SoC Verification Engineer with 7+ years of ASIC/SoC/IP verification experience to drive verification and validation of complex designs across simulation, emulation, and FPGA prototyping environments.

The ideal candidate will have deep expertise in SystemVerilog/UVM, strong RTL debugging skills, and hands‑on experience with hardware emulation, FPGA prototyping, and software‑driven validation. This role involves close collaboration with design, architecture, firmware, and software teams to achieve robust verification and high‑quality silicon.

Key Responsibilities:

• Develop and execute verification strategies for IP, subsystem, and SoC‑level designs.
• Build scalable and reusable verification environments using SystemVerilog, UVM, SVA, scoreboards, and functional coverage.
• Drive functional verification, regressions, debug, coverage analysis, and verification closure.
• Debug complex RTL, testbench, firmware, and system‑level issues across simulation, emulation, and FPGA platforms.
• Enable and support emulation, FPGA prototyping, software‑driven validation, and pre‑silicon bring‑up.
• Collaborate with design, architecture, firmware, and software teams on system‑level verification and validation.
• Improve verification productivity through automation, methodology enhancements, and reusable verification infrastructure.
• Lead technical discussions and mentor junior engineers.

Required Qualifications:

• Bachelor's or Master's degree in Electrical, Electronics, Computer Engineering, or a related discipline.
• 4 to 10 years of hands‑on experience in ASIC, SoC, or IP verification.
• Strong expertise in SystemVerilog, UVM, SVA, constrained‑random verification, functional coverage, and coverage closure.
• Good understanding of Verilog RTL, ASIC/SoC flows, CDC, reset verification, and low‑power verification concepts.
• Strong programming/scripting skills in C/C++, Python, Tcl, Perl, or Shell.
• Experience with Git, regression automation, and CI/CD workflows.

Emulation & FPGA Prototyping

• Hands‑on experience with Siemens Veloce/Veloce TBX, Cadence ZeBu, Palladium, or equivalent emulation platforms.
• Experience or familiarity with SCE-MI, DPI‑C, transaction‑based acceleration, co‑emulation, hybrid verification, and software‑driven validation.
• Experience with Xilinx/AMD FPGA prototyping and validation flows.
• Familiarity with UltraScale+, Versal architectures, and Vivado is preferred.

Protocol Expertise

Hands‑on verification or debugging experience with one or more of the following: LPDDR5/LPDDR5X/LPDDR6, PCIe, Ethernet, USB, UART, I2C/I3C, MIPI C‑PHY/D‑PHY, AXI, AHB, or APB.

Preferred Qualifications:

• Experience with large‑scale and complex SoC verification environments.
• Strong exposure to emulation and FPGA‑based system validation.
• Experience with software bring‑up, system‑level validation, and post‑silicon debug.
• Familiarity with AI‑assisted verification and design methodologies.
• Exposure to AI/Generative AI‑based tools and automation frameworks for improving verification productivity.

What We're Looking For:

• Strong analytical and debugging skills with the ability to solve complex hardware/software interaction issues.
• Excellent communication and cross‑functional collaboration skills.
• Strong ownership and ability to independently drive verification deliverables.
• Ability to lead technical discussions, influence engineering decisions, and mentor engineers.
• A proactive mindset with a strong commitment to quality, execution, and continuous improvement.

Minimum Qualifications:

• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience.
• Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.
• PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience.

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