Senior Staff Verification Engineer - Video

Qualcomm; Bengaluru; On-site; INR 3,000,000 - 4,200,000; Full time

Job summary

Qualcomm India Private Limited in Bengaluru is seeking a Senior Staff Verification Engineer with 13+ years of industry experience in ASIC/SoC/IP verification. You will define verification architecture, plan tests, and drive end-to-end validation for complex IPs and subsystems.

You will mentor engineers, collaborate with architecture, design, firmware, and system teams, and champion automation, coverage closure, and debug excellence in a fast-paced hardware environment.

Qualifications

• 13+ years in ASIC/SoC/IP verification.
• Strong SystemVerilog and UVM expertise for large-scale environments.
• Experience with coverage-driven verification and closure.
• Experience integrating C/C++ models in UVM environments.
• Strong debugging skills and problem-solving.
• Hands-on ABV and SystemVerilog Assertions experience.
• Scripting in Python/Perl/Shell/TCL for automation.

Responsibilities

• Define and drive verification architecture, methodology, and execution strategy for complex IPs.
• Lead verification planning, testbench architecture, coverage closure, regression strategy, and sign-offs.
• Own end-to-end verification delivery including plan, testbench, stimulus, and coverage.
• Collaborate with architecture, design, firmware, and system teams to ensure full coverage.
• Mentor engineers and promote verification best practices and automation.
• Drive project execution and risk management through technical leadership.

Skills

ASIC/SoC/IP verification

SystemVerilog

UVM

Coverage-driven verification

C/C++ reference models

ABV & SVA

Python/Perl/Shell/TCL scripting

Education

Bachelor's degree in Electrical/Electronics or related field

Master's degree in Electrical/Electronics or related field

PhD in related field

Job description

Company:

Qualcomm India Private Limited

Job Area:

Engineering Group, Engineering Group > Hardware Engineering

General Summary:

As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements.

Minimum Qualifications:

• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience.


• Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 5+ years of Hardware Engineering or related work experience.


• PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience.

We are looking for a highly experienced Senior Staff Verification Engineer with 13+ years of industry experience in IP, subsystem verification. The candidate will be expected to provide technical leadership, drive verification strategy, mentor engineers, and ensure first-pass silicon quality through robust verification methodologies and best practices.

Key Responsibilities

• Define and drive verification architecture, methodology, and execution strategy for complex IPs, subsystems.


• Lead verification planning, testbench architecture, coverage closure, regression strategy, and sign-off activities.


• Own end-to-end verification delivery including:
  
  
  
  • Verification plan development
  
  
  • Testbench architecture and implementation
  
  
  • Test and stimulus development
  
  
  • Coverage analysis and closure
  
  
  • Debug and root-cause analysis
  
  
  
  


• Collaborate closely with architecture, design, firmware, and system teams to ensure comprehensive verification coverage.


• Drive adoption of verification best practices, automation, and productivity improvements across teams.


• Mentor and technically guide junior and senior verification engineers.


• Influence project execution through technical leadership and risk management.

Required Qualifications

• 13+ years of experience in ASIC/SoC/IP verification.


• Strong expertise in SystemVerilog and UVM with proven experience architecting large-scale reusable verification environments.


• Extensive experience in coverage-driven verification methodologies and coverage closure.


• Proven experience integrating and validating C/C++ reference models within UVM/SystemVerilog environments.


• Strong debugging skills


• Hands-on experience with Assertion-Based Verification (ABV) and SystemVerilog Assertions (SVA).


• Good scripting skills in Python, Perl, Shell/TCL, with experience in automation and productivity enhancement.

Preferred Technical Experience

• Good understanding of video and multimedia architectures, including one or more of:
  
  
  
  • Video codecs (H.264, H.265/HEVC, AV1, VP9)
  
  
  • Video processing pipelines
  
  
  • DMA frameworks
  
  
  
  


• Experience with industry-standard interfaces and protocols:
  
  
  
  • AXI/AHB/APB
  
  
  • NoC architectures
  
  
  
  


• Exposure to firmware-hardware co-verification and system-level validation.

Additional Desired Experience

• subsystem verification


• Firmware verification


• Gate-Level Simulation (GLS)


• Power-Aware Verification (UPF)


• Formal Verification


• Emulation


• Performance verification and validation


• Silicon bring-up support and post-silicon debug

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