CPU RTL Power Engineer (Senior/Lead/Staff)

Qualcomm; Bengaluru; On-site; INR 1,800,000 - 3,200,000; Full time

Job summary

Qualcomm India Private Limited is seeking a Hardware Engineer to plan, design, verify, and test ASIC systems, with a focus on low power concepts and high-performance Snapdragon CPU design for sub-10nm SoCs in the mobile space.

The role involves close work with RTL, physical design, low power, and automation teams to optimize performance and power while delivering cutting-edge solutions. Strong analytical skills and experience in Primetime/PowerArtist are valued.

Qualifications

• 3 - 10 years low power design experience with Primetime/PrimePower, Synthesis/Constraints, Signoff STA.
• Experience with multiple power domain understanding with complex UPF/CPF definitions.

Responsibilities

• Participate in development of ASICs, low power concepts.
• Low power checks, timing and power analysis.
• Create design of experiments and perform detailed comparisons to improve results.
• Collaborate with RTL, physical design, low power and automation teams to optimize performance and power.
• Tabulate metrics results for analysis and comparison.
• Bachelor's/Master's degree in Science, Engineering, or related field.

Skills

ASIC design

Analytical skills

Problem solving

Education

Bachelor's degree in CS/EE/Engineering

Master's degree in CS/EE/Engineering

PhD in CS/EE/Engineering

Tools

Primetime/PrimePower

Synthesis

PowerArtist

PTPX

RC/RCP

Place & Route tools

Perl/Tcl scripting

Job description

Company:

Qualcomm India Private Limited

Job Area:

Engineering Group, Engineering Group > Hardware Engineering

General Summary:

As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements.

Minimum Qualifications:

• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience.
• OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience.
• OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.

We are looking for bright ASIC design engineers with excellent analytical and technical skills. This is an excellent opportunity to be part of a fast paced team responsible for delivering Snapdragon CPU design, flows for high performance SoCs in sub-10nm process for mobile space.

Job Description:

• Participate on a project involved in the development of ASICs, low power concepts, .
• low Power checks, timing and power analysis.
• Create design of experiments and do detailed comparison analysis to improve quality of results.
• Work closely with RTL design, physical design, low power and automation teams to optimize performance and power
• Tabulate metrics results for analysis comparison
• Bachelor's/Master's degree in Science, Engineering, or related field.

Note :

References to a particular number of years' experience are for indicative purposes only. Applications from candidates with equivalent experience will be considered, provided that the candidate can demonstrate an ability to fulfil the principal duties of the role and possesses the required competencies.

Requirements:

• 3 - 10years Low power design understanding and low power checks working knowledge, Primetime/Primepower , Synthesis/Constraints, Signoff STA, or related work experience.
• Extensive experience in Primetime/ptpx, PowerArtist, Synthesis with DCT/DCG or RC/RCP..
• Complete ASIC flow with low power, performance and area optimization techniques
• Experience with STA using Primetime and PTPX required
• Experience of multiple power domain understanding with complex UPF/CPF definition required
• Perl/Tcl scripting is required
• Strong problem solving and ASIC development/debugging skills
• Experience with CPU micro-architecture and their critical path
• High speed CPU implementation
• Place and route tool understanding

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