Core CPU Physical Design Engineer (Lead/Staff/Sr Staff)

Qualcomm; Bengaluru; On-site; INR 3,000,000 - 6,000,000; Full time

Job summary

Qualcomm India Private Limited seeks a seasoned hardware engineer to plan, design, verify and test complex electronic systems. You will drive bring-up yields, physical design signoff, and collaborations across RTL to GDSII, addressing power integrity, timing, and signal integrity in high-frequency cores.

The role requires 7–14 years in Physical Design, expertise in PDN, STA, and low-power flows, plus strong problem-solving and team-delivery capabilities.

Qualifications

• Bachelor's degree with 4+ years hardware engineering experience
• Master's degree with 3+ years hardware engineering experience
• PhD with 2+ years hardware engineering experience
• 7–14 years experience in Physical Design and timing signoff for high speed cores
• Exposure to high frequency design convergence for physical design with PPA targets and PDN methodology
• Degrees in Electrical/Electronics with at least 7+ years in IC design
• Experience in leading block or chip level Physical Design, STA and PDN activities
• RTL to GDSII implementation, working independently
• Ability to collaborate and resolve issues wrt constraints validation, verification, STA, Physical design
• Knowledge of low power flow (power gating, multi-Vt flow, power supply management)
• Circuit-level understanding of time critical paths in design, leakage, SI/DFM
• Tcl/Perl scripting
• Willingness to handle technical deliveries with a small team of engineers
• Strong problem-solving skills

Responsibilities

• Plan, design, optimize, verify and test electronic systems across Digital/Analog/RF/optical domains
• Lead bring-up yields and PDN methodology to meet performance targets
• Coordinate with cross-functional teams to deliver high-quality hardware solutions
• Oversee RTL to GDSII implementation and physical design signoff
• Address constraints validation, verification, timing, and power integrity issues
• Mentor junior engineers and drive technical deliveries with a small team

Skills

RTL to GDSII implementation

Strong problem-solving skills

Collaborative

Tcl/Perl scripting

Education

Bachelor's degree in Electrical/Electronics Engineering

Master's degree in Electrical/Electronics Engineering

PhD in Electrical/Electronics Engineering

Tools

Tcl/Perl scripting

Job description

Company:

Qualcomm India Private Limited

Job Area:

Engineering Group, Engineering Group > Hardware Engineering

General Summary:

As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements.

Minimum Qualifications:

• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience.
• Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience.
• PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.
• 7-14 yrs experience in Physical Design and timing signoff for high speed cores.
• Should have good exposure to high frequency design convergence for physical design with PPA targets and PDN methodology.
• Masters/Bachelors Degree in Electrical/Electronics science engineering with at least 7+ years of experience in IC design.
• Experience in leading block level or chip level Physical Design, STA and PDN activities.
• Work independently in the areas of RTL to GDSII implementation.
• Ability to collaborate and resolve issues wrt constraints validation, verification, STA, Physical design, etc.
• Knowledge of low power flow (power gating, multi-Vt flow, power supply management etc.)
• Circuit level comprehension of time critical paths in the design Understanding of deep sub-micron design problems and solutions (leakage power, signal integrity, DFM etc.)
• Tcl/Perl scripting Willing to handle technical deliveries with a small team of engineers.
• Strong problem-solving skills.

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