Senior Engineer -DFT

Arm; Bengaluru; Hybrid; INR 2,500,000 - 3,800,000; Full time

Job summary

Arm seeks a highly skilled DFT engineer to architect, implement, and validate advanced DFT techniques on ARM SoCs. You will insert DFT logic at both RTL and gate levels, validate all features, and generate ATE-patterns for silicon.

Collaborate with front-end, back-end, and test teams for timing closure and silicon characterization. Ideal candidates will have Proficiency in Verilog RTL, TCL, or Perl, and strong Unix/Linux experience, with a degree in Electronic/Computer Engineering or related

Qualifications

• Core DFT skills include scan compression, memory BIST, logic BIST, at-speed test, ATPG and fault simulation.
• Experience in RTL coding with Verilog, TCL and/or Perl.
• Proficient in Unix/Linux environments.
• Degree in Electronic/Computer Engineering or related field (Bachelors or Masters).

Responsibilities

• Architect, implement, and validate DFT techniques on ARM SoCs.
• Insert DFT logic at RTL level and synthesis gate level; validate features.
• Generate ATE-tested patterns for silicon; collaborate with front-end and back-end teams on timing and validation.

Skills

Scan compression & insertion

Memory BIST & repair

Logic BIST

JTAG/IJTAG

at-speed test

ATPG

fault simulation

gate level verification

silicon debugging

memory & scan diagnostics

Verilog RTL

TCL

Perl

Unix/Linux

Education

Bachelor's or Master's in Electronic/Computer Engineering

Tools

Siemens DFT tools

Cadence tools

Synopsys tools

Job description

Responsibilities

Architect, implement, and validate innovative DFT techniques on ARM SoCs. Insert DFT logic into SoC style designs at the RTL level and at the Synthesis gate level, validate all features, and generate ATE targeted test patterns to be run on silicon. Work closely with front-end design and verification teams on DFT RTL level insertion, back-end synthesis, place-and-route, and static-timing-analysis teams on gate level insertion and timing closure, and Test and Debug teams on silicon characterization and validation.

Required Skills And Experience

• Core DFT skills considered for this position should include some of the following: Scan compression and insertion, Memory BIST and repair scheme implementation, Logic BIST, JTAG/IJTAG, at-speed test, ATPG, fault simulation, back-annotated gate level verification, silicon debug, memory and scan diagnostics


• Experience ranges from 3- 20 Years.


• Experience coding Verilog RTL, TCL and/or Perl


• Proficient in Unix/Linux environments


• Bachelors or Master's degree or equivalent experience in Electronic Engineering, Computer Engineering, or a related field

Nice To Have Skills and Experience

• Familiarity with IEEE 1149, 1500, 1687, 1838


• Synthesis & Static Timing Analysis


• Familiarity with SoC style architectures including multi-clock domain and low power design practices.


• Validated understanding of Siemens DFT tools


• Familiarity with Arm IP like the following: Cortex CPUs, Mali GPUs, AMBA protocols, CoreLink interconnects, CoreSight debug


• Experience with 2.5D and 3D test


• Ability to work both collaboratively on a team and independently


• Hard-working and excellent time management skills with an ability to multi-task


• An upbeat demeanor to working on exciting projects on the cutting edge of technology


• Experience with Siemens, Cadence, and/or Synopsys DFT and simulation tools

Accommodations at Arm

At Arm, we want to build extraordinary teams. If you need an adjustment or an accommodation during the recruitment process, please email [e-mail] . To note, by sending us the requested information, you consent to its use by Arm to arrange for appropriate accommodations. All accommodation or adjustment requests will be treated with confidentiality, and information concerning these requests will only be disclosed as necessary to provide the accommodation. Although this is not an exhaustive list, examples of support include breaks between interviews, having documents read aloud, or office accessibility. Please email us about anything we can do to accommodate you during the recruitment process.

Hybrid Working at Arm

Arm's approach to hybrid working is designed to create a working environment that supports both high performance and personal wellbeing. We believe in bringing people together face to face to enable us to work at pace, whilst recognizing the value of flexibility. Within that framework, we empower groups/teams to determine their own hybrid working patterns, depending on the work and the team’s needs. Details of what this means for each role will be shared upon application. In some cases, the flexibility we can offer is limited by local legal, regulatory, tax, or other considerations, and where this is the case, we will collaborate with you to find the best solution. Please talk to us to find out more about what this could look like for you.

Equal Opportunities at Arm

Arm is an equal opportunity employer, committed to providing an environment of mutual respect where equal opportunities are available to all applicants and colleagues. We are a diverse organization of dedicated and innovative individuals, and don't discriminate on the basis of race, color, religion, sex, sexual orientation, gender identity, national origin, disability, or status as a protected veteran.