Senior Engineer - Physical design

Arm Limited; Bengaluru; Hybrid; INR 5,000,000 - 7,500,000; Full time

Benefits offered by this job

Accommodation support

Hybrid working

Job summary

Arm Limited is seeking a senior ASIC implementation professional to lead synthesis, timing constraints and physical design across Arm cores, systems and SoCs. You will drive constraints development, analyze timing and power, and push methodologies to improve implementation efficiency.

The role requires strong problem-solving, collaboration across teams, and hands-on experience with tape-outs on multi-million gate designs. Proficiency in Python scripting is beneficial for automation.

Qualifications

• Master’s degree equivalent in Electrical Engineering, Computer Engineering or other relevant technical fields.
• 8+ years of proven experience in ASIC system-on-chip implementation flow from RTL to GDS.
• Experience in Timing Constraints development, Synthesis, Timing Closure
• Possess a high level of dedicated, initiative and problem-solving skills.
• Experience of tape outs of multi-million gate designs on latest technologies
• Ability to develop and work with timing constraints for build and signoff
• The ability to effectively work alone as well as in a team
• LEC, CLP and ECO implementation knowledge to handle ECO cycles.

Responsibilities

• Synthesis, Physical design and implementation of Arm cores, systems and SoCs
• Ability to lead synthesis and constraints development , technical leadership
• Analyze design timing, area and power to help improve the quality of Arm IP.
• Develop and deploy new methodologies to improve implementation efficiency and results.
• Support and develop detailed implementation analysis and data-mining methodologies.
• Automation, Python knowledge and bringing in faster and efficient execution
• Work with implementation and physical IP RTL design teams to drive analysis and optimization of our IP.

Skills

Synthesis

Timing constraints

Timing closure

Python scripting

Automation

Team collaboration

Verilog

Tcl

Shell

Perl

Education

Master’s degree in Electrical Engineering or Computer Engineering

Tools

LEC

CLP

Job description

Job Description:In Arm's Solutions Engineering group, our primary focus extends beyond the development of advanced System-on-Chips (SoCs). In the endeavour to deliver a quality silicon we need to ensure all our signoff checks across various domains are diligently performed. Delivering quality silicon leads to quality rewards and every effort and skill is recognized and appreciated at ARM. Our responsibilities also encompass improvising methodologies, influencing EDA tools and build a knowledge base which will help in our product design. Learning and sharing knowledge is part of ARM culture and is very much appreciated and encouraged. If your interested in working with a team of collaborative and smart engineers responsible for validating RTL-to-Gate and Gate-to-GDS implementations, ensuring power intent correctness, and enabling high-quality silicon tapeout

Responsibilities:

• Synthesis, Physical design and implementation of Arm cores, systems and SoCs
• Ability to lead synthesis and constraints development , technical leadership

• Analyze design timing, area and power to help improve the quality of Arm IP.

• Develop and deploy new methodologies to improve implementation efficiency and results.

• Support and develop detailed implementation analysis and data-mining methodologies.
• Automation , Python knowledge and bringing in faster and efficient execution

• Work with implementation and physical IP RTL design teams to drive analysis and optimization of our IP.

Required Skills and Experience :

• Master’s degree equivalent in Electrical Engineering, Computer Engineering or other relevant technical fields.

• 8+ years of proven experience in ASIC system-on-chip implementation flow from RTL to GDS.

• Experience in Timing Constraints development, Synthesis, Timing Closure

• Possess a high level of dedicated, initiative and problem-solving skills.

• Experience of tape outs of multi-million gate designs on latest technologies

• Ability to develop and work with timing constraints for build and signoff

• The ability to effectively work alone as well as in a team
• Ability to create trusting relationship and good work environment. Good professional attitude.
• LEC, CLP and ECO implementation knowledge to handle ECO cycles.

“Nice To Have” Skills and Experience :

• Experience with a wide range of programming, scripting & data presentation languages Eg. Tcl, Shell, Perl, Python.

• Experience with low power design techniques (power gating, voltage/frequency scaling).

• Experience with Verilog RTL design

• Understanding of DFT modes and their implications on Physical Design
• Learn quickly new flows and adapt to new developing environment.

#LI-BB1

Accommodations at Arm

At Arm, we want to build extraordinary teams. If you need an adjustment or an accommodation during the recruitment process, please email [e-mail]. To note, by sending us the requested information, you consent to its use by Arm to arrange for appropriate accommodations. All accommodation or adjustment requests will be treated with confidentiality, and information concerning these requests will only be disclosed as necessary to provide the accommodation. Although this is not an exhaustive list, examples of support include breaks between interviews, having documents read aloud, or office accessibility. Please email us about anything we can do to accommodate you during the recruitment process.

Hybrid Working at Arm

Arm’s approach to hybrid working is designed to create a working environment that supports both high performance and personal wellbeing. We believe in bringing people together face to face to enable us to work at pace, whilst recognizing the value of flexibility. Within that framework, we empower groups/teams to determine their own hybrid working patterns, depending on the work and the team’s needs. Details of what this means for each role will be shared upon application. In some cases, the flexibility we can offer is limited by local legal, regulatory, tax, or other considerations, and where this is the case, we will collaborate with you to find the best solution. Please talk to us to find out more about what this could look like for you.

Equal Opportunities at Arm

Arm is an equal opportunity employer, committed to providing an environment of mutual respect where equal opportunities are available to all applicants and colleagues. We are a diverse organization of dedicated and innovative individuals, and don’t discriminate on the basis of race, color, religion, sex, sexual orientation, gender identity, national origin, disability, or status as a protected veteran.