Senior Design Lead - BIOS, Test/Interface/Uc Board Design, CPU

HCL Technologies Limited; Bengaluru; On-site; INR 3,500,000 - 4,600,000; Full time

Job summary

HCLTech in Bangalore is seeking a Senior Design Lead for BIOS, test/interface/UC board design, CPU, with 8+ years in electronics hardware for pre- and post-silicon validation of complex SoCs/ASICs. The role involves leading design of high‑speed validation boards, developing schematics, and overseeing multilayer PCB layouts.

You will collaborate across silicon, firmware, and software teams to enable efficient debug, bring-up, and validation of next-generation devices.

Qualifications

• B.E./B.Tech/M.E./M.Tech in Electronics or Electrical Engineering.
• 8+ years of experience in hardware design and lead roles.
• Experience with high-speed interfaces and board bring-up.

Responsibilities

• Design high-speed validation boards for ASICs/SoCs/MCUs/FPGA.
• Develop schematics and oversee multilayer PCB layout.
• Support silicon bring-up and validation, develop debug methodologies.
• Perform SI/PI analyses and define routing constraints for high-speed designs.

Skills

Schematic design

PCB design

High-speed design

Education

B.E./B.Tech/M.E./M.Tech in Electronics or Electrical Engineering

Tools

Cadence OrCAD/Allegro

Altium Designer

Mentor Graphics Xpedition

Job description

Senior Design Lead - BIOS, Test/Interface/UC Board Design, CPU

Location: Bangalore, Karnataka, India

Job Summary

Seeking an experienced Silicon Validation Board Design Engineer to design, develop, and support hardware platforms used for pre-silicon emulation, post-silicon validation, characterization, and bring-up of complex SoCs/ASICs. The candidate will work closely with silicon design, validation, firmware, and software teams to enable efficient debug and validation of next-generation.

Key Responsibilities

Design high-speed validation and characterization boards for ASICs, SoCs, MCUs, and FPGAs. Develop schematics and oversee PCB layout for multilayer boards.

Design interfaces including:

• PCIe
• USB
• Ethernet
• DDR/LPDDR
• MIPI CSI/DSI

Signal & Power Integrity

• Conduct Signal Integrity (SI) analysis for high-speed interfaces.
• Perform Power Integrity (PI) simulations and power delivery network validation.
• Define stack-ups and routing constraints for high-speed PCB designs.
• Work with PCB vendors and assembly houses for successful board fabrication.

Silicon Bring-up & Validation

• Support first silicon bring-up activities.
• Develop validation plans and debug methodologies.
• Investigate silicon, board, and system-level issues.
• Perform hardware debugging using:
  • Oscilloscope
  • Logic analyzer
  • Protocol analyzers
  • JTAG debuggers
  • Spectrum analyzers

Skill Requirements

B.E./B.Tech/M.E./M.Tech in Electronics, Electrical Engineering, 8+ years (Lead Engineer)

Technical Skills

• Schematic design tools:
  • Cadence OrCAD/Allegro
  • Altium Designer
  • Mentor Graphics Xpedition
• PCB design for 10+ layer high-speed boards.
• DDR3/DDR4/DDR5 or LPDDR design experience.
• Knowledge of PCIe Gen4/Gen5 design considerations.
• Power supply design including PMICs and DC-DC converters.
• JTAG and boundary scan debugging.
• Silicon validation methodologies.

Lab Skills

• Oscilloscope measurements up to multi-GHz ranges.
• High-speed serial interface debug.
• Power rail characterization and current profiling.

Information at a Glance

Why HCLTech?

At HCLTech, you'll supercharge your potential. You'll find your career. And you'll find your spark. All at a place that knows that helping its customers stay on top starts by putting its people first.

HCLTech is a global technology company, home to more than 223,000 people across 60 countries, delivering industry-leading capabilities centered around digital, engineering, cloud and AI, powered by a broad portfolio of technology services and products. We work with clients across all major verticals, providing industry solutions for Financial Services, Manufacturing, Life Sciences and Healthcare, Technology and Services, Telecom and Media, Retail and CPG, and Public Services. Consolidated revenues as of 12 months ending June 2026totaled $14.8billion.