Senior Design Engineer(FPGA RTL)

Lattice Semiconductor Corp.; Pune District; On-site; INR 2,000,000 - 4,000,000; Full time

Job summary

Lattice Semiconductor is seeking a Senior Design Engineer (FPGA RTL) to drive FPGA RTL design, verification, and hardware debug across multiple India locations, including Pune and Hyderabad. You will work on high-speed IO protocols and IP packaging, contributing to design validation and timely project milestones.

The role requires hands-on experience in FPGA RTL design, simulation, and timing closure, with strong programming skills in C/C++, Perl, TCL or Python, and a BS/MS/PhD in Electronics or

Qualifications

• BS/MS/PhD in Electronics or Computer Engineering minimum of 5 years of FPGA system design experience.
• Independent and self-motivated, capable of executing under dynamic environment and uncertainties.
• Hands-on experience in FPGA RTL design, logic verification, debug and timing closure.

Responsibilities

• Design and implement FPGA RTL and IP blocks for complex designs.
• Perform logic simulation, FPGA compilation, and timing closure to meet performance goals.
• Conduct hardware validation and debugging to ensure functional correctness.
• Collaborate with cross-functional teams including verification, software, and hardware teams to ensure timely delivery.

Skills

FPGA RTL design

Logic verification

Debug & timing closure

Programming languages (C/C++, Perl, Py

High-speed IO protocols

Education

BS/MS/PhD in Electronics or Computer Engineering

Tools

Testbench development

IP packaging

Job description

## Senior Design Engineer(FPGA RTL)Apply: Hyderabad, India: Pune, India: Full time: Posted Today: R-103070# **Lattice Overview**There is energy here...energy you can feel crackling at any of our international locations. It’s an energy generated by enthusiasm for our work, for our teams, for our results, and for our customers. Lattice is a worldwide community of engineers, designers, and manufacturing operations specialists in partnership with world-class sales, marketing, and support teams, who are developing programmable logic solutions that are changing the industry. Our focus is on R&D, product innovation, and customer service, and to that focus, we bring total commitment and a keenly sharp competitive personality.Energy feeds on energy. If you flourish in a fast paced, results-oriented environment, if you want to achieve individual success within a “team first” organization, and if you believe you can contribute and succeed in a demanding yet collegial atmosphere, then Lattice may well be just what you’re looking for.**Job Description:**We are seeking a Senior IP Design engineer with significant hands-on experience in FPGA RTL design, logic simulation, FPGA compilation and timing closure and hardware debug.RequirementsKey Skills* Hands-on experience in FPGA RTL design, logic verification, debug and timing closure* Programming skills (e.g.: C/C++, Perl, TCL or Python)* Experience in high-speed IO protocols (e.g.: PCIe, Ethernet, CPRI, JESD204B/C)* Experience in hardware validation and debug is a plus* Experience in soft IP packaging, example design and testbench development will be an added advantageEducation and General:* BS/MS/PhD in Electronics or Computer Engineering minimum of 5 years of FPGA system design experience.* Independent and self-motivated, capable of executing under dynamic environment and uncertainties#LI-DNP**Additional Information:**This position requires a successful background and reference checks and satisfactory proof of your right to work in:India