Senior CPU Clock Design Engineer

Intel Technology India Pvt Ltd

Bengaluru

Hybride

INR 2 800 000 - 4 000 000

Plein temps

Il y a 9 jours

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Résumé du poste

Intel Corporation in Bengaluru is seeking a CPU Senior Clock Design Engineer to design, implement, analyze, and optimize clock distribution networks for high-performance CPUs and SoCs. You will contribute to CTS methodologies, perform timing analysis, and develop clock-related design solutions within a cross-functional team.

The role requires strong ownership, curiosity, and collaboration across architecture, design, physical implementation, and EDA teams, with a hybrid work model in mind.

Qualifications

  • Bachelor's degree in Electrical or Electronics engineering; 3+ years of hands-on experience in physical design implementation OR Master's with 2+ years of experience.
  • Extensive experience with clock tree synthesis techniques using Synopsys and Cadence.
  • Strong understanding of submicron process node technologies and LVS/DRC verification methods.

Responsabilités

  • Design, implement, and optimize clock distribution networks for CPU/SoC products.
  • Contribute to clock architecture development and CTS methodologies.
  • Perform timing analysis and support timing closure across complex semiconductor designs.
  • Develop custom circuits, library cells, and clock-related design solutions.
  • Analyze performance, power, area, and timing tradeoffs to improve efficiency.
  • Create automation solutions using scripting to improve design productivity.
  • Collaborate with architecture, design, physical implementation, validation, and EDA teams.
  • Support debug, validation, and optimization activities throughout product development.
  • Drive technical issues to closure while maintaining high-quality engineering standards.
  • Influence future methodologies and clocking technologies.

Connaissances

Analytical thinking
Communication
Team collaboration

Formation

Bachelor's degree in Electrical or Electronics
Master's degree in Electrical or Electronics

Outils

Synopsys
Cadence
LVS/DRC

Description du poste

CPU Senior Clock Design Engineer Job Details: Job Description: The Role and Impact Join a Team That Defines the Heartbeat of Next-Generation CPUs. As a CPU Senior Clock Design Engineer, you will contribute to the design, implementation, analysis, and optimization of clock distribution networks that enable industry-leading performance, power efficiency, and product scalability. Business group You will be part of Intel Corporation, joining a dynamic team dedicated to designing high-performance CPUs that drive Intel's leadership in the semiconductor industry.

Key Responsibilities
  • Design, implement, and optimize clock distribution networks for high-performance CPU and SoC products.
  • Contribute to clock architecture development and clock tree synthesis (CTS) methodologies.
  • Perform timing analysis and support timing closure across complex semiconductor designs.
  • Develop custom circuits, library cells, and clock-related design solutions.
  • Analyze performance, power, area, and timing tradeoffs to improve product efficiency.
  • Create automation solutions using scripting and programming languages to improve design productivity.
  • Collaborate closely with architecture, design, physical implementation, validation, and EDA teams.
  • Support debug, validation, and optimization activities throughout the product development lifecycle.
  • Drive technical issues to closure while maintaining high-quality engineering standards.
  • Influence future methodologies, design flows, and clocking technologies.
Qualifications
Minimum Qualifications
  • Bachelor's degree in Electrical, Electronics, or relevant field and 3+ years of hands-on experience in physical design implementation OR Master's degree in Electrical, Electronics, or relevant field with 2+ years of experience.
  • Extensive experience in clock tree synthesis (CTS) techniques and methodologies using Synopsys and Cadence platforms.
  • Strong understanding of submicron process node technologies and layout verification methods such as LVS/DRC.
Preferred Qualifications
  • Strong ownership and accountability for technical deliverables.
  • Curiosity and passion for solving complex engineering challenges.
  • Effective problem-solving and analytical thinking skills.
  • Ability to collaborate across multiple engineering disciplines.
  • Strong communication skills with both technical and non-technical stakeholders.
  • Adaptability and willingness to learn new tools, technologies, and methodologies.
  • Ability to balance multiple priorities in a fast-paced environment.
  • Continuous focus on quality, execution, and innovation.

Make an impact in shaping the future of CPU technology. Join us and be part of a world-class team that drives innovation and technological excellence at Intel.

Job Type: Experienced Hire

Shift: Shift 1 (India)

Primary Location: India, Bangalore

Position of Trust: N/A

Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation or any other characteristic protected by local law, regulation, or ordinance.

Work Model for this Role: This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.

Job posting details such as work model, location or time type are subject to change.

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

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