SDC, Synthesis and STA Engineer

AMD; Hyderabad; On-site; INR 1,600,000 - 2,200,000; Full time

Benefits offered by this job

AMD benefits at a glance

Job summary

AMD Hyderabad is seeking an SDC, Synthesis and STA Engineer to drive front-end implementation of IPs and SOCs. You will own SDC development, generation, verification, and timing closure, coordinating with design and PNR teams to ensure on-time delivery.

The role requires strong experience with SDC constraints, synthesis, LEC/CLP, RTL and netlist checks, and a passion for automation and AI-enabled tooling.

Qualifications

• 8+ years of experience in Electrical Engineering with VLSI/ASIC background.
• Strong knowledge of SDC, constraints, and timing closure.
• Experience with synthesis, LEC, CLP and timing closure.
• Understanding RTL and netlist checks.
• Collaborates with design and PNR teams to drive closure.
• Interest in AI, scripting and automation.

Responsibilities

• Own constraints and SDC development for IPs, SS and SoCs.
• Handle SDC generation, verification, promotion/demotion and equivalence.
• Coordinate with design and PNR teams to meet schedules.
• Plan timing closure across prelayout and postlayout STA.
• Ensure quality delivery for synthesis and timing closure.
• Debug and resolve technical issues.

Skills

SDC development

Constraints development

Synthesis

Timing closure

RTL & Netlist checks

Collaboration with design/PNR

Education

Bachelor's degree in Electrical Engineering

Master's degree in Electrical Engineering

Tools

Lint tools

CDC tools

Timing analysis tools

Job description

ADVANCE YOUR CAREER. ADVANCE THE WORLD.

At AMD, we believetechnology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMDis shapingthefuture.

Whetheryou’redesigning next-gen processors, enabling AI breakthroughs, orbringing leading edge products to market, every role at AMD contributes to something bigger— technologythat moves the world forward.Join us and, together, we’ll advance your career.

SDC, Synthesis and STA Engineer

THE ROLE:

The focus of this role is to plan and execute the front end implementation of IPs and its closure. This involves ownership of SDC development, SDC generation, verification, promotion/demotion and equivalence checking. The role might also epxand to (if needed) synthesis, LEC, CLP, prelayout STA and postlayout STA/Timing closure. Co-ordinate with design team and PNR teams. Guide team members on technical issues.

KEY RESPONSIBILITIES:

• Main responsibility is to own constratins, SDC developement for IPs, SS and SoCs. Including SDC generation, verification, promotion, demotion and equivalence using third party or self built tools.
• Additonal responsibilities for front end implementation of IPs might include synthesis, LEC, CLP, prelayout STA and postlayout STA/Timing closure
• Prior experience with Lint, CDC and RTL & Netlist based static checks is a plus
• Collaborate with designer and PNR teams to achieve closure.
• Understand duration required, plan and execute as per schedule.
• Complete quality delivery for synthesis and timing closure.
• Debug and resolve technical issues

PREFERRED EXPERIENCE:

• Existing SDC, constraints development with or without using fisthail, excellicon or TCM.
• Experienced in synthesis, LEC, CLP and timing closure
• Preferred top level or SOC level experience
• Have handled blocks with complex designs, high frequency clocks and complex clocking
• complete understanding of timing constraints, low power aspects and concepts of DFT
• Have debug experience to solve issues.
• Interst in AI, Scripting and automation

ACADEMIC CREDENTIALS:

• Bachelors with 8 years of experience or Masters degree with 6 years of experience in Electrical Engineering

Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.