Principal Analog Validation Engineer

NXP Semiconductors; Maharashtra; On-site; INR 2,400,000 - 4,200,000; Full time

Job summary

NXP Semiconductors in Maharashtra, India is seeking a Senior Validation Engineer to lead validation across MCU/MPU subsystems, post-silicon platforms, and pre-silicon efforts. You will develop test plans, create comprehensive coverage, and debug across hardware–software boundaries.

The role requires 10–13+ years in semiconductor validation with strong hands-on MCU/embedded experience and leadership capabilities.

Qualifications

• Bachelor’s or Master’s degree in Electrical/Electronics/Computer Engineering (or related).
• 10–13+ years of experience in semiconductor validation (analog), product engineering, or silicon debug.
• Strong hands-on background in MCU architectures.
• Embedded systems.
• Lab bring-up and silicon debug tools (JTAG, logic analyzers, scopes, etc.).
• Proven ability to lead large, distributed engineering teams.
• Excellent communication and executive presence.

Responsibilities

• Define validation plans for MCU/MPU subsystems (CPU, memory, peripherals, interconnects).
• Develop test cases and coverage metrics based on architecture and design specs.
• Identify corner cases, stress scenarios, and system-level use cases.
• Perform post-silicon validation on silicon platforms, evaluation boards, and emulators.
• Support pre-silicon validation/emulation efforts where required.
• Debug issues across hardware–software boundary.
• Develop validation test suites using C/C++, Python, or scripting languages.
• Build automation frameworks for regression and validation flows.
• Create scripts for data capture, logging, and analysis.
• Perform low-level debugging using tools such as JTAG, SWD, logic analyzers, oscilloscopes.
• Work with RTL design teams, verification teams, and firmware/software teams; review architecture and design specs.

Skills

MCU architectures

Embedded systems

Lab bring-up & silicon debug tools

Team leadership

Executive communication

Education

Bachelor’s or Master’s degree in Electrical/Electronics/Computer Engineering

Tools

JTAG

SWD

Logic analyzers

Oscilloscopes

ETM/ITM trace tools

Job description

• Define validation plans for MCU/MPU subsystems (CPU, memory, peripherals, interconnects).
• Develop test cases and coverage metrics based on architecture and design specs.
• Identify corner cases, stress scenarios, and system-level use cases.
  
  
• Perform post-silicon validation on silicon platforms, evaluation boards, and emulators.
• Support pre-silicon validation/emulation efforts where required.
• Debug issues across hardware–software boundary.
  
  

Job Responsibilities

Validation Planning & Strategy

• Define validation plans for MCU/MPU subsystems (CPU, memory, peripherals, interconnects).
• Develop test cases and coverage metrics based on architecture and design specs.
• Identify corner cases, stress scenarios, and system-level use cases.
  
  

Silicon & Pre-Silicon Validation

• Perform post-silicon validation on silicon platforms, evaluation boards, and emulators.
• Support pre-silicon validation/emulation efforts where required.
• Debug issues across hardware–software boundary.
  
  

Test Development & Automation

• Develop validation test suites using C/C++, Python, or scripting languages.
• Build automation frameworks for regression and validation flows.
• Create scripts for data capture, logging, and analysis.
  
  

Hardware/Firmware Debug

• Perform low-level debugging using tools such as:
• JTAG, SWD
• Logic analyzers, oscilloscopes
• Trace tools (ETM, ITM)
• Root cause failures across:
• CPU cores (ARM/RISC-V)
• Memory subsystems (DDR, SRAM, Flash)
• Peripherals (UART, SPI, I2C, GPIO, etc.)
  

Cross-Functional Collaboration

• Work with:
• RTL design teams (for bug fixes and clarifications)
• Verification teams (for coverage gap closure)
• Firmware/software teams (for test enablement)
• Review architecture and design specifications.
  

Job Qualification

• Bachelor’s or Master’s degree in Electrical/Electronics/Computer Engineering (or related).
• 10–13+ years of experience in semiconductor validation (analog), product engineering, or silicon debug.
• Strong hands-on background in:
• MCU architectures
• Embedded systems
• Lab bring-up and silicon debug tools (JTAG, logic analyzers, scopes, etc.)
• Proven ability to lead large, distributed engineering teams.
• Excellent communication and executive presence.
  

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