PNR

Neurealm Company; Ernakulam; On-site; INR 600,000 - 900,000; Full time

Job summary

Neurealm Company is seeking a qualified PNR engineer to drive full-chip physical design efforts across floorplanning, placement, CTS, routing, and optimization in a fast-paced environment. You will ensure timing closure, power and area targets, and work closely with RTL, STA, and DFT teams to converge designs.

The role emphasizes advanced node awareness (7nm/5nm/3nm) and proficiency in DRC/LVS checks, IR drop, and EM analysis, plus scripting in TCL/Python to streamline flows.

Qualifications

• Experience in full chip/PNR flow and signoff.
• Strong hands-on with PNR tools and flows.
• Knowledge of timing, power, and area KPIs.

Responsibilities

• Perform full chip / block-level Physical Design (PNR) activities.
• Work on floorplanning, placement, CTS, routing, and optimization.
• Handle timing closure and congestion analysis.
• Perform physical verification checks (DRC, LVS, IR drop, EM analysis).
• Collaborate with RTL, STA, and DFT teams for design convergence.
• Explore low power techniques and multi-voltage designs.

Skills

Place & Route (PNR)

Cadence Innovus

Synopsys ICC2

STA concepts

Advanced nodes (7nm/5nm/3nm)

Physical verification (DRC/LVS)

Scripting (TCL/Python)

Tools

Cadence Innovus

Synopsys ICC2

Job description

# Job Description**Back** ## PNR14-06-2026 17:10:31Job\_304082---* Chennai, Tamil Nadu, India (WAC\_007)* Bangalore, Karnataka, India (WAC\_003)* Kochi, Kerala, India (WAC\_004)## **Job Responsibilities:*** Perform **full chip / block-level Physical Design (PNR)** activities* Work on **floorplanning, placement, CTS (Clock Tree Synthesis), routing, and optimization*** Handle **timing closure and congestion analysis*** Perform **physical verification checks (DRC, LVS, IR drop, EM analysis)*** Collaborate with **RTL, STA, and DFT teams** for design convergence* Work on **low power techniques and multi-voltage designs*** Ensure design meets **performance, power, and area (PPA)** targets ## **Required Skills:** + Strong experience in **Place & Route (PNR)** flow + Hands-on with tools like **Cadence Innovus / Synopsys ICC2** + Good knowledge of **STA concepts** + Experience in **advanced nodes (7nm / 5nm / 3nm is a plus)** + Understanding of **physical verification (DRC/LVS)** + Scripting knowledge (**TCL / Python**) is an added advantageApply Now