Physical Design Lead(High Speed IP's)

Advanced Micro Devices, Inc.

Bengaluru

On-site

INR 4,500,000 - 7,000,000

Full time

3 days ago
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Job summary

Advanced Micro Devices, Inc. is seeking an experienced Senior Member of Technical Staff to lead physical design for high-speed IPs across DDR/LPDDR/GDDR PHYs and PCIe. You will coordinate with architects, RTL, AMS, and CAD teams to meet aggressive PPA and schedule targets on cutting-edge process nodes.

You will mentor engineers, drive modernization of design flows, and push AI-assisted signoff methods to improve productivity and quality. This role is based in Bengaluru, India.

Qualifications

  • 12+ years of industry experience in Physical Design for advanced semiconductor products.
  • Proven track record delivering multiple successful tape-outs on advanced technology nodes (N3/N4/N5 or equivalent).
  • Deep expertise in high-performance and high-speed interface IPs.
  • Expertise in Timing, EMIR, clock tree, and physical verification.
  • Experience with industry-standard EDA tools including Cadence and Synopsys implementation/signoff flows.
  • Demonstrated leadership across cross-functional teams and geographies.

Responsibilities

  • Lead physical design implementation of complex high-speed IPs such as DDR/LPDDR/GDDR PHYs, PCIe, SerDes, and related subsystems.
  • Own end-to-end implementation activities
  • Drive high-frequency timing closure for challenging datapaths and clock distribution networks.
  • Partner with architects and circuit designers to optimize PHY architectures for performance, power, and implementation efficiency.
  • Develop and deploy innovative implementation methodologies to improve design quality, productivity, and scalability.
  • Collaborate with cross-functional teams including Architecture, RTL, AMS, Package, SI/PI, Product Engineering, SoC, CAD, and EDA vendors.
  • Provide technical leadership for multiple projects and influence implementation strategies across organizational boundaries.
  • Mentor junior engineers and help grow the technical capability of the organization.
  • Drive continuous improvement initiatives in automation, AI-assisted design methodologies, and signoff flows.

Skills

Leadership
Mentoring
Cross-functional collaboration
Problem solving

Education

Bachelors or Masters in Computer or Electrical Engineering

Tools

Cadence
Synopsys implementation/signoff

Job description

ADVANCE YOUR CAREER. ADVANCE THE WORLD.

At AMD, we believetechnology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMDis shapingthefuture.


Whetheryou’redesigning next-gen processors, enabling AI breakthroughs, orbringing leading edge products to market, every role at AMD contributes to something bigger— technologythat moves the world forward.Join us and, together, we’ll advance your career.


SMTS SILICON DESIGN ENGINEER

THE ROLE:

AMD is looking for an experienced and highly motivated Senior Member of Technical Staff (PMTS) to join the CT Physical Design team. In this role, you will drive the physical implementation of industry-leading high-speed interface IPs including DDR, LPDDR, GDDR, PCIe, and other next-generation mixed-signal PHY solutions used across client, server, and graphics products. As a technical leader, you will work closely with architects, circuit designers, RTL, package, power integrity, signal integrity, SoC, and methodology teams to define and implement innovative physical design solutions that achieve aggressive PPA, frequency, power, and schedule goals on advanced process nodes. The ideal candidate combines deep physical design expertise with strong leadership capabilities and a proven track record of delivering complex, high-performance IPs to production.


THE PERSON:

You are passionate about solving complex physical design challenges in advanced semiconductor technologies. You thrive in fast-paced environments, influence technical direction beyond your immediate team, and enjoy mentoring engineers while driving innovation in implementation methodologies. You possess deep understanding of high-speed digital and mixed-signal design implementation and have successfully delivered multiple tape-outs in advanced technology nodes.


KEY RESPONSIBILITIES:


  • Lead physical design implementation of complex high-speed IPs such as DDR/LPDDR/GDDR PHYs, PCIe, SerDes, and related subsystems.

  • Own end-to-end implementation activities

  • Drive high-frequency timing closure for challenging datapaths and clock distribution networks.

  • Partner with architects and circuit designers to optimize PHY architectures for performance, power, and implementation efficiency.

  • Develop and deploy innovative implementation methodologies to improve design quality, productivity, and scalability.

  • Collaborate with cross-functional teams including Architecture, RTL, AMS, Package, SI/PI, Product Engineering, SoC, CAD, and EDA vendors.

  • Provide technical leadership for multiple projects and influence implementation strategies across organizational boundaries.

  • Mentor junior engineers and help grow the technical capability of the organization.

  • Drive continuous improvement initiatives in automation, AI-assisted design methodologies, and signoff flows.


REFERRED EXPERIENCE:


  • 12+ years of industry experience in Physical Design for advanced semiconductor products.

  • Proven track record delivering multiple successful tape-outs on advanced technology nodes (N3/N4/N5 or equivalent).

  • Extensive experience with high-performance and high-speed interface IPs

  • Deep expertise in one of the fields: Timing, EMIR, clock tree, physical verification

  • Expertise with industry-standard EDA tools including Cadence and Synopsys implementation/signoff flows.

  • Experience driving methodology development and automation.

  • Demonstrated leadership across cross-functional teams and geographies.


ACADEMIC CREDENTIALS:


  • Bachelors or Masters degree in computer engineering/Electrical Engineering


#LI-PM2


Benefits offered are described: AMD benefits at a glance.


AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.


AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.


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