PD Engineer

AMD

Bengaluru

On-site

INR 2,400,000 - 3,600,000

Full time

4 days ago
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Benefits offered by this job

AMD benefits at a glance

Job summary

AMD is seeking a highly skilled Physical Design Engineer to join its Silicon Design team in Bengaluru. You will implement high-performance ASIC/SoC blocks from synthesis to tapeout while meeting timing, power, area, and reliability targets.

The role requires deep knowledge of PD flows, EDA tools, and 5nm/3nm/2nm node considerations. You will work closely with RTL, Synthesis, DFT, STA, Power, and Verification teams, develop automation scripts to boost PD productivity, and support tapeout

Qualifications

  • Bachelor's or Master's degree in Electronics, Electrical, VLSI Design or Computer Engineering.
  • Strong expertise in physical design methodologies and EDA tools.
  • Experience with advanced technology nodes (16nm/7nm/5nm/3nm).

Responsibilities

  • Physical implementation of digital blocks from netlist to GDSII.
  • Floorplanning, power planning, placement, CTS and routing optimization.
  • Timing closure, DRC/LVS, and sign-off activities.
  • Debug physical design issues across advanced nodes.
  • Collaborate with RTL, Synthesis, DFT, STA, Power and Verification teams.

Skills

Tcl
Python
Perl
Shell scripting

Education

Electronics Engineering
Electrical Engineering
VLSI Design
Computer Engineering

Tools

ICC2
Fusion Compiler
PrimeTime
StarRC
IC Validator
Innovus
Tempus
Voltus
Genus
Calibre DRC/LVS

Job description

ADVANCE YOUR CAREER. ADVANCE THE WORLD.

At AMD, we believe technology has the power to solve the world's most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMD is shaping the future.

ADVANCE YOUR CAREER. ADVANCE THE WORLD.

At AMD, we believe technology has the power to solve the world's most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMD is shaping the future. Whether you're designing next-gen processors, enabling AI breakthroughs, or bringing leading edge products to market, every role at AMD contributes to something bigger - technology that moves the world forward. Join us and, together, we'll advance your career.

Physical Design Lead Job Summary

We are seeking a highly motivated Physical Design Engineer to join our Silicon Design team. The candidate will be responsible for implementing high-performance ASIC/SoC blocks from synthesis to tapeout while meeting timing, power, area, and reliability targets. The role requires strong expertise in physical design methodologies, EDA tools, and advanced technology nodes.

Key Responsibilities
  • Perform physical implementation of digital blocks from netlist to GDSII.
  • Execute and optimize:
    • Floorplanning
    • Power Planning
    • Placement
    • Clock Tree Synthesis (CTS)
    • Routing
    • Timing Closure
    • Physical Verification
  • Analyze and close:
    • Setup and Hold timing violations
    • Signal Integrity issues
    • Crosstalk violations
    • IR Drop and Electromigration (EM)
    • DRC/LVS violations
  • Work closely with RTL, Synthesis, DFT, STA, Power, and Verification teams.
  • Develop methodologies and automation scripts to improve PD productivity.
  • Support tapeout activities and signoff closure.
  • Debug physical design issues across advanced technology nodes (5nm/3nm/2nm as applicable).
Required Qualifications
Education
  • Bachelor's or Master's degree in:
    • Electronics Engineering
    • Electrical Engineering
    • VLSI Design
    • Computer Engineering
Technical Skills
Physical Design Flow
  • RTL-to-GDSII implementation
  • Floorplanning
  • Power Grid Design
  • Placement Optimization
  • CTS
  • Routing
  • ECO Implementation
  • Timing Closure
Timing Analysis
  • Static Timing Analysis (STA)
  • OCV/AOCV/POCV concepts
  • Multi-mode Multi-corner (MMMC) analysis
  • Timing Signoff Closure
Physical Verification
  • DRC/LVS
  • Antenna Checks
  • Density Checks
  • LEC awareness
Low Power Design
  • UPF/CPF concepts
  • Power gating
  • Multi-voltage methodologies
  • Retention and Isolation strategies
Strong Scripting Skills In
  • Tcl
  • Perl
  • Python
  • Shell scripting
EDA Tools Experience
Synopsys
  • ICC2
  • Fusion Compiler
  • PrimeTime
  • StarRC
  • IC Validator
Cadence
  • Innovus
  • Tempus
  • Voltus
  • Genus
Siemens/Mentor
  • Calibre DRC/LVS
Preferred Qualifications
  • Experience with advanced technology nodes (16nm/7nm/5nm/3nm).
  • Knowledge of high-performance DDR, CPU, GPU, PCIE, AI/ML, Networking, or Data Center SoCs.
  • Understanding of package and chiplet integration concepts.
  • Experience in hierarchical and full-chip implementation flows.
  • Strong debugging and problem-solving skills.
  • Excellent communication and collaboration abilities.

Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD's "Responsible AI Policy" is available here.

This posting is for an existing vacancy.

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