Physical Design Engineer 1997

Sunrise Biztech Systems; Bengaluru; On-site; INR 900,000 - 1,500,000; Part time

Job summary

Sunrise Biztech Systems is hiring a Software Download Engineer in Bengaluru with 4-8 years of experience. The role focuses on block shaping, floorplan development, and tile-level pin placement, with additional involvement in bump planning and RDL routing.

Responsibilities include health checks on top-level physical design collaterals and collaboration with cross-functional teams to ensure successful integration of the design, power/ground grid considerations, and high-fanout synthesis.

Qualifications

• Hands-on experience with physical design concepts.
• Experience with top-level integration and floorplan development.
• Knowledge of lattice EDA concepts is advantageous.

Responsibilities

• Perform health and sanity checks on top-level physical design collaterals.
• Collaborate with cross-functional teams to ensure successful top-level integration.
• Apply block shaping and floorplan strategies to optimize layouts.
• Coordinate RDL routing and clock trunk planning efforts.

Skills

Block Shaping

Tile-Level Pin Placement

Bump Planning

Bump Placement

RDL Routing

Top-Level Clock Trunk Planning

Power/Ground Grid Planning

Health Checks

Top-Level LEC

High-Fanout Synthesis

Job description

Urgent Hiring!!!

Greetings from Sunrise Biztech Systems Pvt. Ltd.

We are hiring for one of our reputed clients for the following position. If you're interested and your experience matches the requirement, we'd love to hear from you.

Position: Software Download Engineer
Experience: 4-8 Years

Location:Bangalore

Contarct :12 Months

Role & responsibilities

• Good knowledge of Block Shaping and floorplan development.
• Hands-on experience with Tile-Level Pin Placement.
• Experience in Bump Planning and Bump Placement.
• Knowledge of RDL Routing is an added advantage.
• Experience in Top-Level Clock Trunk Planning.
• Strong understanding of Power/Ground (PG) Grid Planning.
• Perform Health Checks and Sanity Checks on top-level physical design collaterals.
• Good knowledge of Top-Level LEC (Logical Equivalence Checking).
• Understanding of High-Fanout Synthesis and related implementation requirements.
• Collaborate with physical design, synthesis, STA, and other cross-functional teams to ensure successful top-level integration.