Physical Design and Implementation Engineer, CPU

Google; Bengaluru; On-site; INR 4,000,000 - 9,000,000; Full time

Job summary

Google is seeking a seasoned ASIC Physical Design Engineer to drive RTL2GDS implementations and optimize PPA across block and full-chip levels. The role focuses on power, performance, and area while shaping the next generation of silicon solutions for Google's products.

Candidates should have a strong background in ASIC physical design, with 8+ years in the field and a track record in CPU/GPU related design, power optimization, and practical experience with RTL to GDS flows.

Qualifications

• Bachelor's degree in Electrical Engineering or Computer Science or equivalent practical experience.
• 8 years of experience in physical design engineering.
• Experience in managing high performance design schema utilizing CPU or GPU.

Responsibilities

• Develop all aspects of ASIC RTL2GDS implementation for high Power, Performance, and Area (PPA) designs.
• Manage block and full-chip level physical implementation and Quality of Results (QoR) (power, timing, area).

Skills

ASIC RTL2GDS

PPA design

CPU/GPU design

Education

Bachelor's degree in Electrical Engineering or Computer Science

Master's degree in Electrical Engineering or Computer Science

Job description

In most instances, this position requires in-person interviews as part of the hiring process.

Minimum qualifications:

• Bachelor's degree in Electrical Engineering or Computer Science, or equivalent practical experience.
• 8 years of experience in physical design engineering.
• Experience in managing high performance design schema utilizing CPU or GPU.

Preferred qualifications:

• Master's degree in Electrical Engineering or Computer Science, or equivalent practical experience.
• Experience with power optimization techniques.

About The Job

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

Google's mission is to organize the world’s information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences.

We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people’s lives better through technology.

Responsibilities

• Develop all aspects of ASIC RTL2GDS implementation for high Power, Performance, and Area (PPA) designs.
• Manage block and full-chip level physical implementation and Quality of Results (QoR) (power, timing, area).

Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also Google's EEO Policy and EEO is the Law. If you have a disability or special need that requires accommodation, please let us know by completing our Accommodations for Applicants form .