PDK Engineer - DRC/SVRS

leadIC Design Pvt Ltd; Dadri; On-site; INR 600,000 - 1,200,000; Full time

Job summary

leadIC Design Pvt Ltd is seeking a PDK Validation Engineer with 2–5 years of semiconductor experience to validate PDK releases and physical verification flows. You will debug DRC rule checks using Calibre and work with SVRF rule decks to ensure robust PDK releases for advanced technologies.

You will analyze DRC violations, develop test cases, and validate rules across variants and configurations while supporting regression tests. Strong Linux/Unix and scripting skills are required.

Qualifications

• 2–5 years of relevant semiconductor experience.
• Hands-on experience in PDK Validation / Physical Verification / Design Enablement.
• Strong hands-on experience with Calibre DRC.
• Good understanding and hands-on exposure to SVRF rule decks — Mandatory.
• Experience in DRC rule checking, debugging and validation.
• Understanding of CMOS layout and semiconductor design rules.
• Exposure to LVS ERC validation.
• Experience with Linux/Unix environments.
• Scripting in Tcl / Python / Perl / SKILL / Shell.

Responsibilities

• Validate PDK releases and physical verification flows across semiconductor technologies.
• Perform and debug DRC rule checks using Calibre.
• Work with SVRF rule decks for DRC validation and debugging.
• Analyze DRC violations and determine source: technology files, layout/design implementation.
• Develop and execute DRC test cases to validate rule-deck functionality.
• Validate PDK/DRC rules across process variants, configurations, and technology nodes.
• Perform LVS/ERC and other physical verification checks as required.
• Support regression testing and qualification of PDK releases.
• Debug rule-deck issues and coordinate with PDK, CAD, Technology, Foundry, and Design teams.
• Maintain validation collateral, test cases, scripts, and regression suites.
• Automate validation and regression activities using Python, Tcl, Perl, SKILL, or Shell.
• Document issues, validation results, and release qualification status.

Skills

PDK Validation

Physical Verification

DRC Rule Checking

SVRF Rule Decks

LVS ERC

Linux/Unix

Python

Tcl

Perl

SKILL

Shell

Tools

Calibre

PCell

Synopsys ICV/PVS

Job description

We are looking for a PDK Validation Engineer with 2–5 years of experience in PDK validation, physical verification, and DRC rule checking, with strong hands‑on experience in Calibre and SVRF rule decks.

The role involves validating and debugging PDK/technology collateral, DRC rule decks, and physical verification flows to ensure robust and accurate PDK releases for advanced semiconductor technologies.

Key Responsibilities

• Validate PDK releases and physical verification flows across semiconductor technologies.
• Perform and debug DRC rule checks using Calibre.
• Work extensively with SVRF rule decks for DRC validation and debugging.
• Analyze DRC violations and determine whether issues originate from:
• Technology files
• Layout/design implementation
• Develop and execute DRC test cases to validate individual rules and rule-deck functionality.
• Validate PDK/DRC rules across different process variants, configurations, and technology nodes.
• Perform LVS/ERC and other physical verification checks as required.
• Support regression testing and qualification of PDK releases.
• Debug rule-deck issues and work with PDK, CAD, Technology, Foundry, and Design teams for resolution.
• Maintain validation collateral, test cases, scripts, and regression suites.
• Automate validation and regression activities using Python, Tcl, Perl, SKILL, or Shell.
• Document issues, validation results, and release qualification status.

Must-Have Skills

• 2–5 years of relevant semiconductor experience.
• Hands‑on experience in PDK Validation / Physical Verification / Design Enablement.
• Strong hands‑on experience with Calibre DRC.
• Good understanding and hands‑on exposure to SVRF rule decks — Mandatory.
• Experience in DRC rule checking, debugging and validation.
• Understanding of CMOS layout and semiconductor design rules.
• Exposure to LVS/ERC validation.
• Experience with Linux/Unix environments.
• Scripting experience in Tcl / Python / Perl / SKILL / Shell.

Good to Have

• Experience in PDK development or qualification.
• Experience with SVRF rule-deck development/modification.
• PCell and technology-file exposure.
• Synopsys ICV/PVS exposure.
• Advanced-node experience such as FinFET/RibbonFET.
• Experience with PDK regression automation.
• Exposure to foundry PDK releases and technology enablement.