Package Architect

Tsavorite Scalable Intelligence; Bengaluru; On-site; INR 4,000,000 - 8,000,000; Full time

Job summary

Tsavorite Scalable Intelligence in Bengaluru, India is seeking a senior package design engineer to drive leading-edge AI product packaging. You will own substrate layout from concept to tape-out, collaborating with silicon, board, and packaging teams to meet stringent DFM, SI, and PI requirements.

The role requires extensive experience with high-speed SerDes (PCIe Gen6, 112–224 G Ethernet) and memory interfaces (DDR5/LPDDR/HBM) and may involve Mentor Xpedition tooling.

Qualifications

• More than 16+ years of experience in flip chip BGA package design.
• Experience with Large Formfactor, high layer count designs, stack-up definition, bump and ball map definition, and package outline drawings.
• Strong understanding of package design rules, design for manufacturing (DFM) and successful tape-out of multiple designs.
• Knowledge of package-level signal integrity and power integrity.
• Experience with High-speed SerDes (PCIe Gen6, 112–224 G Ethernet) and memory interfaces like DDR5, LPDDR and HBM.
• Mentor Xpedition experience is preferred.

Responsibilities

• Own the package design of leading-edge AI products for Tsavorite from feasibility to tape-out.
• Lead feasibility studies for new IP definitions and package design concepts.
• Own substrate layout from start to finish and tape out multiple products.
• Co-design between silicon, package, and board.
• Collaborate with SI, PI, PCB, mechanical and thermal teams to meet product requirements.
• Interface with OSAT/Packaging suppliers to follow design rules, review package designs, ensure DFM, and document BOM.

Skills

Flip chip BGA design

SerDes PCIe Gen6

Memory interfaces DDR5/LPDDR/HBM

Signal integrity

Power integrity

Mentor Xpedition

Tools

Mentor Xpedition

Job description

Founded in 2023,by Industry veterans HQ in California,US

Company Description:

We are product based startup. The products are chipsets and intelligent machines that enable scalable enterprises AI, streaming video intelligence, training trillion parameter models, and fine-tuning LLMs, allowing enterprises to improve productivity with advanced solutions. We are looking for exceptional talent and leadership to join our organization, the world’s first company developing Agentic Silicon for powering the future of AI.

We are pioneering a new era in AI innovation focused on accelerating the

adoption of end-to-end enterprise AI, from the edge to Zettascale systems.

Our cutting-edge Software and composable silicon Chiplets will transform the way AI models are Trained, Deployed, and Scaled.

\"Join Our Growing Team!\"

We are building a world-class team to drive innovation in AI Silicon & Software and hiring for below position in Bangalore

Qualifications:

• More than 16+ years of experience in the flip chip BGA package design
• Experience working on the Large Formfactor, high layer count designs, Stack-up definition, Bump and ball map definition, Package outline drawings
• Very good understanding of the package design rules as well as design for manufacturing and successful tape out of multiple designs.
• Knowledge of Package level signal integrity and power integrity.
• Worked on High speed Serdes(PCIE Gen6, 112-224 G Ethernet) and memory interface like DDR5, LPDDR and HBM.
• Mentor Xpedition experience is preferred.

Responsibilities:

• Responsible for the package design of the Leading edge AI products for Tsavorite.
• Responsible for the feasibility studies for the new IP definition and Package design concepts.
• Owning the substrate layout design from start to end and taping out multiple products
• Co-design between Silicon, package and board.
• Collaborate closely with the Signal integrity, power integrity leads, PCB design, Mechanical and thermals to optimize the design to meet the product requirements.
• Interface with the OSAT/Packaging suppliers to understand the design rules, review the package design, meet DFM requirements and Documentation of BOM.