MTS ASIC Architect Bengaluru, Karnataka, India Posted a day ago

Micron Technology, Inc; Bengaluru; On-site; INR 1,800,000 - 2,500,000; Full time

Job summary

Micron Technology, Inc. seeks an MTS ASIC Architect in Bengaluru, Karnataka to lead architectural decisions in DRAM products. This role involves significant collaboration across technology generations and driving high-performance memory solutions.

Ideal candidates have extensive experience in DRAM die architecture, a relevant engineering degree, and demonstrated technical leadership. Join us in transforming how the world uses information.

Qualifications

• Proven experience leading architectural decisions on complex memory subsystems.
• Extensive understanding of architectural trade-offs affecting bandwidth and power efficiency.
• Experience engaging with customers and industry standards organizations.

Responsibilities

• Define ASIC and logic architectures for high data throughput.
• Lead architectural trade-off analyses across DRAM silicon and system integration.
• Drive architectural analysis including IO timing considerations.

Skills

DRAM die architecture

Architectural trade-offs

Technical leadership

Micro-architectural decisions

Education

Bachelor's degree in Electrical Engineering or related field

Master’s or PhD degree in relevant engineering field

Tools

PPA evaluation tools

Job description

## MTS ASIC ArchitectBengaluru, Karnataka, IndiaApply NowFind out how well you match with this jobJob IDJR102590**Our vision is to transform how the world uses information to enrich life for *all*.**Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.**DRAM ASIC Architecture****Role Overview**The **DRAM ASIC Architecture team** defines silicon level architectures that extend and differentiate the value of Micron’s DRAM products. The team works across technology generations and product lines, collaborating closely with design, product, systems, and ecosystem partners to deliver scalable, reliable, and high-performance memory solutions aligned with customer and market needs.As a **Member of Technical Staff**, you will provide senior level architectural leadership for ASIC and logic-based DRAM solutions that emphasize **high bandwidth, energy efficiency, scalability, and reliability**. This role spans **near term product execution** and **long term technology direction**, with architectural ownership over decisions that impact bandwidth density, latency, RAS, and system observability.**Key Responsibilities*** **High‐Bandwidth DRAM Architecture** + Define ASIC and logic architectures that enable high data throughput, efficient parallelism, and scalable bandwidth delivery for advanced DRAM products. + Drive architectural features that improve effective bandwidth, latency efficiency, and utilization under demanding workloads.* **Silicon–Package–System Co‐Optimization** + Lead architectural trade‐off analyses across DRAM silicon, ASIC logic, packaging constraints, and system integration considerations. + Ensure architectural choices account for power delivery, thermals, signal integrity, and form‐factor limitations.* **Architectural Partitioning & Interfaces** + Influence functional partitioning and interface definition across DRAM devices and associated logic to optimize performance, power, and scalability. + Contribute to definition of robust, scalable interfaces and protocols that support high data rates and reliable operation.* **Silicon Architecture Analysis** + Drive architectural analysis including PPA evaluation, IO timing considerations, and scalability paths for next‐generation DRAM products. + Establish architectural guardrails that enable reuse and extensibility across product families and technology nodes.* **Technical Quality & First‐Silicon Success** + Perform micro‐architectural, RTL, and design reviews, along with verification and coverage reviews, to ensure high‐quality execution and first‐silicon success. + Proactively identify architectural risks and guide mitigation strategies in collaboration with design and validation teams.* **Technical Leadership & Mentorship** + Serve as a technical mentor and architectural authority for execution teams, elevating technical rigor and design quality. + Influence cross‐functional decisions through clear reasoning, data‐driven analysis, and deep architectural insight.**Minimum Qualifications*** Bachelor’s degree or higher in Electrical Engineering, Computer Engineering, Computer Science, or a related field.* Extensive professional experience in **DRAM die architecture**, including deep understanding of architectural trade‐offs affecting bandwidth, latency, power efficiency, and reliability (RAS).* Proven experience leading **micro‐architectural and architectural decisions** on complex memory subsystems or silicon solutions, from specification through product delivery.**Preferred Qualifications*** Master’s or PhD degree (or equivalent experience) in a relevant engineering or computer science field.* Experience collaborating across multiple technical domains such as DRAM silicon, ASIC logic, packaging, high‐speed interfaces, or system architecture.* Experience engaging with customers, ecosystem partners, or industry standards organizations (e.g., JEDEC).* Demonstrated technical leadership across multiple projects or product generations.* Familiarity with system‐level tradeoffs involving performance, power, signal integrity, thermals, or cost.**About Micron Technology, Inc.**We are an industry leader in innovative memory and storage solutions transforming how the world uses information to enrich life *for all*. With a relentless focus on our customers, technology leadership, and manufacturing and operational excellence, Micron delivers a rich portfolio of high-performance DRAM, NAND, and NOR memory and storage products through our Micron and Crucial brands. Every day, the innovations that our people create fuel the data economy, enabling advances in artificial intelligence and 5G applications that unleash opportunities — from the data center to the intelligent edge and across the client and mobile user experience. To learn more, please visit micron.com/careers All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status. To request assistance with the application process and/or for reasonable accommodations, please contact hrsupport\[e-mail] Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards.Micron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron.