Mixed-Signal Design RTL Design Engineer

TylSemi, Inc.; Bengaluru; On-site; INR 1,800,000 - 2,400,000; Full time

Job summary

TylSemi, Inc. is looking for a Digital PID Controller Engineer in Bengaluru to design digital control loops for high-frequency multi-phase IVRs. The role requires a strong mixed-signal background, expert-level experience with MATLAB/Simulink, and proven capabilities in converting algorithms into synthesizable RTL.

The ideal candidate will work on mixed-signal verification, architect control loops, and collaborate closely with analog designers. A hybrid work model is available for this position.

Qualifications

• Strong mixed-signal background with solid understanding of analog power circuits.
• Expert-level MATLAB/Simulink experience building power converter models.
• Experience converting MATLAB/Simulink algorithms into synthesizable RTL.

Responsibilities

• Architect, model, and implement digital PID control loops for IVRs.
• Develop high-fidelity plant models in MATLAB/Simulink.
• Perform closed-loop stability analysis and mixed-signal verification.

Skills

Mixed-signal expertise

MATLAB/Simulink experience

Digital control systems

Power converter design

Digital design tools proficiency

Education

BSEE/MSEE or PhD

Tools

Synopsys VCS

Verdi

Design Compiler

PrimeTime

Job description

Digital PID Controller Engineer

We are building chiplet infrastructure IP for AI/HPC systems and seeking an engineer with deep mixed‑signal expertise to design digital control loops for high‑frequency multi‑phase IVRs.

Responsibilities

• Architect, model, and implement digital PID / cascade control loops (voltage‑mode, current‑mode, or hybrid) for high‑frequency multi‑phase IVRs operating at 10–100 MHz.
• Develop high‑fidelity plant models in MATLAB / Simulink (averaged and switched models) using extracted parasitics from Ansys Q3D / SIwave.
• Perform closed‑loop stability analysis on switched power stages.
• Translate validated MATLAB/Simulink controller models into production‑quality RTL (Verilog / SystemVerilog) using HDL Coder or manual high‑quality coding.
• Design and implement supporting digital blocks: ADC interface, DPWM (digital PWM).
• Collaborate closely with analog designers on loop compensation, sensor design, quantization effects, and delay budgeting.
• Perform mixed‑signal verification: co‑simulation of RTL (VCS / Xcelium) with analog models (Spectre / APS) and behavioral models (Simulink / SIMPLIS / PLECS).
• Analyze and optimize for area, power, timing, and metastability in the digital controller across PVT corners.
• Support silicon bring‑up, debug, and controller tuning on lab hardware.

Qualifications

• Strong mixed‑signal background with solid understanding of analog power circuits (buck converters, 3‑level buck, hybrid SC‑inductor topologies) and digital control systems.
• Expert‑level MATLAB / Simulink experience building averaged and switched power converter models.
• Proven experience converting MATLAB/Simulink control algorithms into clean, synthesizable RTL.
• Deep knowledge of digital PID implementation challenges: quantization, sampling effects, computational delay, fixed‑point arithmetic, and limit cycling.
• Familiarity with high‑frequency power converter control (10–100 MHz) and digital PWM modulators (DPWM).
• Experience with mixed‑signal verification flows (analog‑digital co‑simulation).
• Good understanding of analog effects impacting digital control: loop delay, sensor non‑idealities, inductor non‑linearities, PDN resonances.
• Proficiency in digital design tools: Synopsys VCS, Verdi, Design Compiler, PrimeTime (or equivalent Cadence flow).
• BSEE / MSEE or PhD with 8+ years of relevant experience in power management ICs or high‑performance mixed‑signal design.
• Good to have: Prior experience designing digital controllers for integrated voltage regulators (IVRs), PoL converters, or high‑current AI/HPC power delivery.

Location

Hybrid / On‑site – Bengaluru