Memory Electrical Validation Engineer

Intel Corporation; Mumbai; On-site; INR 1,800,000 - 2,400,000; Full time

Job summary

Intel Corporation in Bengaluru, India, is seeking a Memory Electrical Validation Engineer to optimize and validate electrical performance for memory IO interfaces. You will work to ensure compliance with industry standards, improve margins, and debug electrical issues to deliver high-quality memory solutions.

The SPE Group leads silicon and platform validation, offering a collaborative environment to tackle complex problems and drive innovative technology for the future.

Qualifications

• Master's degree and 3+ years of electrical validation or debugging experience.
• Proficient in validating memory IO interfaces and signal integrity.
• Familiarity with compliance testing against industry-standard specifications.

Responsibilities

• Define electrical validation strategies for memory IO interfaces.
• Validate circuit analog performance, signal integrity, and system margins.
• Analyze and optimize Memory Reference Code (MRC) requirements.
• Collaborate on testing, validation, and optimization of memory IO and mixed-signal architectures.
• Develop validation procedures, margins evaluation, and test infrastructure.
• Debug failures to identify root causes and resolve electrical issues.
• Test electrical interactions between design features using validation infrastructure.
• Prepare validation specifications, evaluate IP, and generate test reports.
• Partner with architecture, design, and presilicon verification for DFT/DFM.

Skills

Electrical validation

Debugging

Signal integrity

Test infrastructure

DFT/DFM

Education

Master's degree in Electrical/Computer Engineering or related field

Job description

Job Details: Job Description: The Role and Impact: As a Memory Electrical Validation Engineer, you will play a pivotal role in optimizing and validating electrical performance for memory IO interfaces. You'll focus on ensuring compliance with industry standards, analyzing margins for stable operation, debugging electrical issues, and driving system-level improvements. Your expertise will directly contribute to delivering high-quality, reliable products that meet production goals while advancing Intel's innovative memory solutions. Business group The Silicon and Platform Engineering (SPE) Group leads Intel's efforts in designing, developing, and validating advanced silicon and platform technologies. This team is committed to delivering cutting-edge solutions that drive Intel's leadership in the semiconductor industry. By joining SPE, you'll be part of a collaborative environment that tackles challenging problems and powers Intel's success in creating transformative technologies for the future.

We're looking for someone eager to make a meaningful impact while solving complex challenges in memory validation.

Key Responsibilities

• Define electrical validation strategies for memory IO interfaces to ensure optimized electrical performance and alignment with production goals.
• Validate circuit analog performance, signal integrity compliance, and system-level margins against industry standards.
• Analyze, debug, and optimize Memory Reference Code (MRC) requirements to improve margins and overall product quality.
• Collaborate on multidisciplinary research for testing, validation, and optimization of memory IO and mixed-signal architectures.
• Develop procedures and designs for validation processes, systems margin evaluation, and test infrastructure.
• Debug functional and triage failures to identify root causes and resolve electrical issues.
• Test electrical interactions between design features using advanced validation infrastructure.
• Prepare validation specifications, evaluate intellectual property (IP), and generate detailed test reports.
• Partner with architecture, design, and presilicon verification teams to ensure effective Design for Testability (DFT) and Design for Manufacturability (DFM) capabilities for IO architectures.

Minimum Qualifications

• Master's degree in Electrical Engineering, Computer Engineering, or a related field.
• 3+ years of hands-on industry experience in electrical validation or debugging
• Proficiency in validating signal integrity and electrical performance of memory IO interfaces.
• Experience with debugging electrical and system-level issues.
• Demonstrated ability to analyze, design, and optimize validation procedures and test infrastructure.
• Familiarity with compliance testing against industry-standard specifications.

Preferred Qualifications

• Familiarity with memory validation tools, techniques, and methodologies.
• Strong collaborative skills, particularly in multidisciplinary research and cross-functional teamwork.
• Proven ability to develop and refine validation strategies for complex architectures.
• Passion for delivering innovative solutions and driving continuous improvement.

Job Type: Experienced Hire Shift: Shift 1 (India) Primary Location: India, Bangalore Additional Locations:

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust N/A

Work Model for this Role This role will require an on-site presence.

Job posting details (such as work model, location or time type) are subject to change.