Lead Trainer - Semiconductor Design & VLSI

Praxis Consultants; Greater Noida; On-site; INR 1,800,000 - 2,800,000; Full time

Job summary

Praxis Consultants in India is seeking an experienced trainer to deliver advanced training in semiconductor design and VLSI, covering digital logic, CMOS, RTL design, verification, synthesis, timing and physical design. You will mentor learners on practical projects, lead capstone presentations and coordinate with EDA trainers to keep content aligned with industry practices.

The role demands 8–15 years of relevant experience, strong expertise in Verilog/SystemVerilog and design flows, and the

Qualifications

• 8–15 years of experience in VLSI/ASIC/FPGA or semiconductor design.
• Strong knowledge of digital design, RTL, Verilog/SystemVerilog, synthesis, STA, and design flows.
• Understanding of verification and physical design concepts.
• Working knowledge of Linux and scripting in design environments.
• Strong technical training, mentoring and troubleshooting skills.

Responsibilities

• Deliver training on digital logic, CMOS and semiconductor design fundamentals.
• Train participants in Verilog/SystemVerilog and RTL design.
• Teach ASIC/FPGA architecture and semiconductor design flows.
• Cover synthesis, timing, constraints and physical-design concepts.
• Develop practical lab exercises, assignments and mini-projects.
• Mentor capstone projects and technical presentations.
• Conduct written, practical and viva assessments.
• Coordinate with EDA trainers for tool-based design workflows.
• Update training content based on current industry practices.
• Support learners in technical troubleshooting and project execution.

Skills

Verilog/SystemVerilog

RTL design

Digital design

Synthesis

STA

ASIC/FPGA design flows

Linux scripting

Mentoring

Troubleshooting

Job description

Job Purpose

To deliver advanced training in semiconductor design and VLSI , covering digital logic, CMOS, RTL design, verification, synthesis, timing and physical design, while mentoring learners on practical projects.

Key Responsibilities

• Deliver training on digital logic, CMOS and semiconductor design fundamentals.
• Train participants in Verilog/SystemVerilog and RTL design .
• Teach ASIC/FPGA architecture and semiconductor design flows.
• Cover synthesis, timing, constraints and physical-design concepts.
• Develop practical lab exercises, assignments and mini-projects.
• Mentor capstone projects and technical presentations.
• Conduct written, practical and viva assessments.
• Coordinate with EDA trainers for tool-based design workflows.
• Update training content based on current industry practices.
• Support learners in technical troubleshooting and project execution.

Required Skills Experience

• 8 15 years of relevant experience in VLSI, ASIC, FPGA or semiconductor design .
• Strong knowledge of Digital Design, RTL, Verilog/SystemVerilog, Synthesis, STA and ASIC/FPGA design flows .
• Understanding of verification and physical-design concepts.
• Working knowledge of Linux and scripting in design environments.
• Strong technical training, mentoring and troubleshooting skills.

Preferred Background

• Experience with ASIC/SoC design houses, semiconductor companies, EDA companies, RD labs or VLSI-focused academic institutions .
• Practical experience with semiconductor design projects and industry-standard workflows.

Disclaimer: This job posting and Location has been aggregated from external source. Role details, content, and availability are subject to change. Applicants are advised to confirm the latest information directly on the company website before applying.