Lead Product Engineer - UCIe & Functional Verification

Cadence; Bengaluru; On-site; INR 1,500,000 - 2,500,000; Full time

Benefits offered by this job

Employee-friendly policies

Multiple learning and development opportunities

Collaborative team culture

Job summary

Cadence seeks a Lead Product Engineer to drive product development and ensure customer success. You will support pre-sales technical activities, focusing on the UCIe domain and translating customer requirements into technical specifications.

The ideal candidate has 5-8 years of experience in verification and design, with a strong understanding of SystemVerilog and UVM methodology. Join us at Cadence to work on cutting-edge technology with a diverse, innovative team.

Qualifications

• 5-8 years of experience with Verification and Design.
• Strong knowledge in UCIe domain and functional verification.
• Experience in developing verification environments using SystemVerilog.

Responsibilities

• Drive development of products and technologies.
• Support pre-sales technical activities for VIP portfolio.
• Translate customer requirements into technical specifications.

Skills

Verification expertise

SystemVerilog

UVM methodology

Problem-solving skills

Education

BE/BTech/ME/MS/MTech in Electrical/Electronics/Computer Science

Job description

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Job Title: Lead Product Engineer

Location: Bangalore

Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality. Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace industrial and health.

The Cadence Advantage

• The opportunity to work on cutting‑edge technology in an environment that encourages you to be creative, innovative, and to make an impact.
• Cadence’s employee‑friendly policies focus on the physical and mental well‑being of employees, career development, providing opportunities for learning, and celebrating success in recognition of specific needs of the employees.
• The unique “One Cadence – One Team” culture promotes collaboration within and across teams to ensure customer success.
• Multiple avenues of learning and development available for employees to explore as per their specific requirement and interests.
• You get to work with a diverse team of passionate, dedicated, and talented individuals who go above and beyond for our customers, our communities, and each other—every day.

Job Summary

Drives development of products and technologies and has material responsibility for the success of that product/technology. VIP PE is expected to be an expert in UCIe domain of Verification IP family—protocol and product-wise. The PE’s main role is to help accelerate VIP portfolio adoption at Cadence’s top‑tier customers by supporting pre‑sales technical activities. To ensure that, one must have strong verification expertise and understand customer design and verification flows. As a UCIe VIP and protocol expert, PE drives product knowledge transfer across our field engineers and customers, providing training and developing collaterals. The PE will also need to translate high‑level requirements from customers into a technical spec and drive the product definition that fits the customer needs. PE is expected to work independently and collaborate with other team members (R&D, Marketing, support) to ensure all dimensions of the product are aligned. This role requires approximately 20% travel on average.

Experience and Technical Skills required

• At least 5 to 8 years of experience with Verification and Design.
• Working knowledge with UCIe domain and functional verification.
• Experience with developing verification environments using SystemVerilog.
• Working knowledge and experience with the UVM methodology.
• Good experience solving complex problems where analysis of situations or data requires an in‑depth evaluation of various factors.
• Excellent problem‑solving and debugging skills.

Qualifications

• BE/BTech/ME/MS/MTech in Electrical/Electronics/Computer Science or equivalent.

Behavioral Skills Required

• Must possess strong written, verbal and presentation skills.
• Ability to establish a close working relationship with both customer peers and management.
• Explore what’s possible to get the job done, including creative use of unconventional solutions.
• Work effectively across functions and geographies.
• Push to raise the bar while always operating with integrity.

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