Lead / Manager - FPGA

CoreEL Technologies; Bengaluru; On-site; INR 1,800,000 - 3,400,000; Full time

Job summary

CoreEL Technologies in Bengaluru seeks an experienced FPGA Technical Lead to drive the complete FPGA design lifecycle for complex digital and wireless systems. You will architect, implement, verify, and integrate DSP blocks with ARM cores in SoCs, guiding a team to deliver on schedule and to stringent quality standards.

The ideal candidate has 7–14 years in FPGA design, with at least 2 years in a leadership role, and is proficient in Verilog/VHDL, Xilinx tools, ModelSim, and SMP/STA techniques.

Qualifications

• BE/B.Tech in Electronics & Communication or related field.
• 7–14 years in FPGA design & development with at least 2 years in a lead role.
• Experience leading architecture, RTL design, synthesis and timing closure.

Responsibilities

• Own the FPGA design architecture and implementation for assigned subsystems or projects.
• Translate requirements into FPGA architectures and signal processing blocks.
• Lead partitioning between FPGA fabric, embedded ARM cores and external components.
• Review RTL for timing, power and resource utilization.
• Guide synthesis, P&R, STA and bitstream generation for Xilinx platforms.
• Lead root-cause analysis for FPGA/hardware integration issues.
• Develop RTL modules for DSP, control and high-speed data interfaces.
• Integrate FPGA logic with embedded ARM software for SoCs.
• Develop and review simulation testbenches using ModelSim.
• Drive functional verification, coverage and regression planning.
• Support hardware bring-up and validation with real-time signals.

Skills

RTL design

Verilog/VHDL

Xilinx tools

ModelSim

Scripting

SoC integration

DSP in FPGA

Mentoring

Education

BE/B.Tech in Electronics & Communication

Tools

ModelSim

Vivado

Zynq SoC

Xilinx FPGA

Job description

The FPGA Technical Lead is responsible for driving the complete FPGA design lifecycle — from architecture definition to on-board validation — for complex digital and wireless communication systems. This role demands both strong technical expertise and leadership capability to guide engineers, ensure design excellence, and deliver mission-critical FPGA-based solutions on schedule and within quality standards.

Education

B.E/B.Tech in Electronics and Communication domain or related.

Experience: 7 to 14 Years in FPGA design & development, including at least 2 years in a lead/ownership role.

Key Responsibilities

1. Technical Leadership

• Own the FPGA design architecture and implementation for assigned subsystems or projects.
• Translate high-level system requirements and signal processing algorithms into efficient FPGA architectures.
• Lead design partitioning between FPGA fabric, embedded ARM cores (for SoCs), and external components.
• Review and optimize RTL code for timing closure, power, and resource utilization.
• Guide the team in synthesis, P&R, STA, and bitstream generation for Xilinx/AMD platforms.
• Lead root cause analysis for FPGA/hardware integration issues.

2. Design & Development

• Develop RTL (VHDL/Verilog) modules for signal processing, control, and high-speed data interfaces.
• Implement and verify digital signal processing modules such as filters, modulators, encoders, and error correction blocks (LDPC, Turbo, etc.).
• Define and maintain FPGA design documentation — architecture specs, interface definitions, implementation reports, and timing analysis records.
• Integrate FPGA logic with embedded ARM software for SoC-based systems (e.g., Zynq/Zynq UltraScale+).
• Develop and review simulation testbenches using ModelSim or XSIM.
• Drive functional verification, coverage, and regression test planning.
• Support hardware bring-up, integration testing, and validation using real-time signals and tactical radio platforms.

4. Process & Quality

• Ensure adherence to ISO 9001:2015 and internal FPGA design development processes.
• Conduct design reviews — input, output, verification, and change reviews — with documented MoMs.
• Collaborate with cross-functional teams (System, Firmware, Hardware, QA) to ensure seamless product integration.
• Mentor junior engineers in RTL design, FPGA methodologies, and debugging practices.
• Provide technical guidance during code reviews, synthesis, and timing closure.
• Encourage continuous learning, reusability, and innovation in FPGA workflows.

Professional Skills:

• RTL design in VHDL/Verilog
• Xilinx tools for synthesis and implementation
• Thorough understanding of Xilinx FPGA’s
• Simulation and verification using ModelSim/XSIM
• Synthesis, place-and-route, static timing analysis, and constraint management
• Hands on with Zynq SoC or Zynq UltraScale+ platforms preferred
• Familiarity with scripting (Tcl/Python/Shell) for simulation & compilation automation
• Hardware Design: Logic Design & Debugging expertise
• Good to have implemented DSP algorithms in FPGA environment for Radar, wireless communication
• Good to have modelled the algorithms in Octave/MATLAB, generated test vectors, visualized data.
• Working knowledge on interfacing with ADCs and DACs and interpreting their performance.
• Configuration/Version control tools like SVN

Desired Attributes/ Soft skills

• Strong analytical and debugging skills at both RTL and board levels.
• Ability to architect modular and reusable FPGA designs.
• Effective communicator with a collaborative mindset across hardware, software, and system teams.
• Ownership-driven attitude with a focus on delivery excellence, decision making and design integrity.
• Enthusiastic mentor fostering technical growth within the team.