Lead FPGA Engineer

ALTEN India; Dehradun; On-site; INR 2,000,000 - 3,000,000; Full time

Benefits offered by this job

Health insurance

Flexible hours

Great work culture

Competitive salary

Professional growth

Cutting-edge projects

Job summary

ALTEN India is seeking a Lead FPGA Engineer in Dehradun to design and implement FPGA based systems, perform static and dynamic analysis with LDRA, and use Vivado/Vitis/Xilinx tools. The role includes coordinating WBS and effort estimates, SVN, and DO-254 IV&V activities across the software lifecycle artifacts.

Ideal candidates have 6-7 years in FPGA domains and hold a BE/B.Tech, with strong experience in DO-254 processes and Xilinx toolchains.

Qualifications

• 6-7 years of FPGA experience.
• Experience with LDRA for static/dynamic analysis.
• Proficient with Vivado/Vitis/Xilinx tools.
• Experience with WBS, effort estimation, SVN.
• Experience leading DO-254 based IV&V activities.
• BE/B.Tech from a recognized university.

Responsibilities

• Design and implement FPGA based systems/sub-systems.
• Conduct static and dynamic analysis using LDRA.
• Work with Vivado/Vitis/Xilinx tools.
• Manage WBS, effort estimations, and SVN.
• Lead DO-254 IV&V activities of complete software lifecycle artefacts.

Skills

Leadership

DO-254 IV&V management

Education

BE/B.Tech

Tools

LDRA

Vivado

Vitis

Xilinx tools

SVN

Job description

Lead FPGA Engineer

We are looking for a talented and experienced Lead FPGA Engineer to join our team in Dehradun. As a Lead FPGA Engineer, you will be responsible for designing and implementing FPGA based systems/sub-systems, conducting static and dynamic analysis using LDRA tool, and working with Vivado/Vitis/Xilinx tools. You will also be involved in WBS, effort estimations, SVN, and managing DO-254 based IV&V activities of complete software lifecycle artefacts.

Key Responsibilities

• Design and implement FPGA based systems/sub-systems
• Conduct static and dynamic analysis using LDRA tool
• Work with Vivado/Vitis/Xilinx tools
• Manage WBS, effort estimations, and SVN
• Lead DO-254 based IV&V activities of complete software lifecycle artefacts

Qualifications

• 6-7 years of experience in FPGA based systems/sub-systems
• Experience working with LDRA tool for static and dynamic analysis
• Proficient in Vivado/Vitis/Xilinx tools
• Strong experience in WBS, effort estimations, and SVN
• Experience managing DO-254 based IV&V activities
• B.E/B.Tech from recognized university/college

Benefits

• Competitive salary
• Opportunity to work on cutting-edge projects
• Professional growth and development
• Health insurance
• Flexible work hours
• Great work culture

If you are a passionate and skilled Lead FPGA Engineer looking to make an impact, we would love to hear from you.